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LAN8700-AEZG Ver la hoja de datos (PDF) - SMSC -> Microchip

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LAN8700-AEZG Datasheet PDF : 73 Pages
First Prev 71 72 73
±15kV ESD Protected MII/RMII Fast-Ethernet PHY with HP Auto-MDIX and SMSC flexPWRTM in a Small Footprint
Datasheet
Chapter 9 Package Outline
Figure 9.1 36-Pin QFN Package Outline, 6 x 6 x 0.90 mm Body (Lead-Free)
Table 9.1 36-Pin QFN Package Parameters
MIN
NOMINAL
MAX
A
0.80
~
1.00
A1
0
~
0.05
A2
0.60
~
0.80
A3
0.20 REF
D
5.85
~
6.15
D1
5.55
~
5.95
D2
3.55
~
3.85
E
5.85
~
6.15
E1
5.55
~
5.95
E2
3.55
~
3.85
L
0.35
~
0.75
e
0.50 Basic
b
0.18
~
0.30
ccc
~
~
0.08
REMARKS
Overall Package Height
Standoff
Mold Thickness
Copper Lead-frame Substrate
X Overall Size
X Mold Cap Size
X exposed Pad Size
Y Overall Size
Y Mold Cap Size
Y exposed Pad Size
Terminal Length
Terminal Pitch
Terminal Width
Coplanarity
Notes:
1. Controlling Unit: millimeter.
2. Dimension b applies to plated terminals and is measured between 0.15mm and 0.30mm from the
terminal tip. Tolerance on the true position of the terminal is ± 0.05 mm at maximum material
conditions (MMC).
3. Details of terminal #1 identifier are optional but must be located within the zone indicated.
4. Coplanarity zone applies to exposed pad and terminals.
SMSC LAN8700/LAN8700I
73
DATASHEET
Revision 1.0 (02-09-07)

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