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LAN8720AI-CP

Small Footprint RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support

SMSC -> Microchip 

CODE

GROUP

11001

00000

00001

00010

00011

00101

01000

01100

10000

Small Footprint RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support

Datasheet

SYM

V

V

V

V

V

V

V

V

V

Table 3.1 4B/5B Code Table (continued)

RECEIVER

INTERPRETATION

INVALID, RXER if during RXDV

INVALID, RXER if during RXDV

INVALID, RXER if during RXDV

INVALID, RXER if during RXDV

INVALID, RXER if during RXDV

INVALID, RXER if during RXDV

INVALID, RXER if during RXDV

INVALID, RXER if during RXDV

INVALID, RXER if during RXDV

TRANSMITTER

INTERPRETATION

INVALID

INVALID

INVALID

INVALID

INVALID

INVALID

INVALID

INVALID

INVALID

3.1.1.3

3.1.1.4

3.1.1.5

3.1.1.6

Scrambling

Repeated data patterns (especially the IDLE code-group) can have power spectral densities with large

narrow-band peaks. Scrambling the data helps eliminate these peaks and spread the signal power

more uniformly over the entire channel bandwidth. This uniform spectral density is required by FCC

regulations to prevent excessive EMI from being radiated by the physical wiring.

The seed for the scrambler is generated from the transceiver address, PHYAD, ensuring that in

multiple-transceiver applications, such as repeaters or switches, each transceiver will have its own

scrambler sequence.

The scrambler also performs the Parallel In Serial Out conversion (PISO) of the data.

NRZI and MLT-3 Encoding

The scrambler block passes the 5-bit wide parallel data to the NRZI converter where it becomes a

serial 125MHz NRZI data stream. The NRZI is encoded to MLT-3. MLT-3 is a tri-level code where a

change in the logic level represents a code bit “1” and the logic output remaining at the same level

represents a code bit “0”.

100M Transmit Driver

The MLT3 data is then passed to the analog transmitter, which drives the differential MLT-3 signal, on

outputs TXP and TXN, to the twisted pair media across a 1:1 ratio isolation transformer. The 10BASE-

T and 100BASE-TX signals pass through the same transformer so that common “magnetics” can be

used for both. The transmitter drives into the 100Ω impedance of the CAT-5 cable. Cable termination

and impedance matching require external components.

100M Phase Lock Loop (PLL)

The 100M PLL locks onto reference clock and generates the 125MHz clock used to drive the 125 MHz

logic and the 100BASE-TX transmitter.

SMSC LAN8720A/LAN8720Ai

19

DATASHEET

Revision 1.4 (08-23-12)

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