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LMU18

16 x 16-bit Parallel Multiplier

LOGIC Devices 

DEVICES INCORPORATED

LMU18

16 x 16-bit Parallel Multiplier

FIGURE 1A. INPUT FORMATS

AIN

BIN

15 14 13

–20 2–1 2–2

(Sign)

Fractional Two’s Complement (TCA, TCB = 1)

210

2–13 2–14 2–15

15 14 13

–20 2–1 2–2

(Sign)

210

2–13 2–14 2–15

15 14 13

–215 214 213

(Sign)

Integer Two’s Complement (TCA, TCB = 1)

210

22 21 20

15 14 13

–215 214 213

(Sign)

210

22 21 20

15 14 13

2–1 2–2 2–3

Unsigned Fractional (TCA, TCB = 0)

210

2–14 2–15 2–16

15 14 13

2–1 2–2 2–3

210

2–14 2–15 2–16

15 14 13

215 214 213

Unsigned Integer (TCA, TCB = 0)

210

22 21 20

15 14 13

215 214 213

210

22 21 20

FIGURE 1B. OUTPUT FORMATS

MSP

LSP

31 30 29

–20 2–1 2–2

(Sign)

31 30 29

–21 20 2–1

(Sign)

31 30 29

–231 230 229

(Sign)

31 30 29

2–1 2–2 2–3

Fractional Two’s Complement (RS = 0)

18 17 16

2–13 2–14 2–15

15 14 13

–20 2–16 2–17

(Sign)

Fractional Two’s Complement (RS = 1)

18 17 16

2–12 2–13 2–14

15 14 13

2–15 2–16 2–17

Integer Two’s Complement (RS = 1)

18 17 16

218 217 216

15 14 13

215 214 213

Unsigned Fractional (RS = 1)

18 17 16

2–14 2–15 2–16

15 14 13

2–17 2–18 2–19

210

2–28 2–29 2–30

210

2–28 2–29 2–30

210

22 21 20

210

2–30 2–31 2–32

31 30 29

231 230 229

Unsigned Integer (RS = 1)

18 17 16

218 217 216

15 14 13

215 214 213

210

22 21 20

2

Multipliers

08/16/2000–LDS.18-O

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