LPC47M102S-MS(2005) Ver la hoja de datos (PDF) - SMSC -> Microchip
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LPC47M102S-MS
(Rev.:2005)
(Rev.:2005)
SMSC -> Microchip
LPC47M102S-MS Datasheet PDF : 5 Pages
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Block Diagram
100 Pin Enhanced Super I/O Controller with LPC Interface for Consumer Applications
SER_IRQ
PCI_CLK
LPC Bus
Signals
SERIAL
IRQ
LPC BUS
INTERFACE
VTR Vcc Vss
nIO_SMI nIO_PME
SMI PME
... Game Port Signals*
(1-Dual)
Game Port
FAN1* FAN_TACH1*
FAN2*
FAN_TACH2*
Fan
Control
DATA BUS
MULTI-MODE
PARALLEL
PORT
MUX
ADDRESS BUS
ACPI
BLOCK
CONFIGURATION
REGISTERS
CLOCK
GEN
CONTROL BUS
WDATA
WCLOCK
SMSC
PROPRIETARY
82077
COMPATIBLE
VERTICAL
FLOPPYDISK
CO NTR OLLER
DIGITAL
DATA
SEPARATOR
WITH WRITE
PRECOM-
PENSATION
CORE
RCLOCK
RDATA
GENERAL
PURPOSE
I/O
16C550
COMPATIBLE
SERIAL
PORT 1
16C550
COMPATIBLE
SERIAL
PORT 2 WITH
INFRARED
MPU-401
SERIAL
PORT
8042
PD0-7
BUSY, SLCT, PE,
nERROR, nACK
nSTB, nSLCTIN,
nINIT, nALF
GP1[0:7]*
GP2[0:2,4:7]*
GP3[0:7]*, GP4[0:3]*
GP5[0:7]*, GP6[0:1]*
TXD1, nCTS1, nRTS1
RXD1
nDSR1, nDCD1, nRI1, nDTR1
IRRX2, IRTX2
TXD2(IRTX), nCTS2, nRTS2*
RXD2(IRRX) *
nDSR2, nDCD2, nRI2, nDTR2*
MIDI_IN
MIDI_OUT
KCLK
KDATA
MCLK
MDATA
GATEA20, KRESET
CLK32 CLOCKI
32KHz 14MHz
nINDEX DENSEL nDS0
nTRK0 nDIR nMTR0
nDSKCHG nSTEP DRVDEN0 nWDATA nRDATA
nWRPRT nHDSELDRVDEN1*
nWGATE
* Denotes Multifunction Pins
Figure 1 LPC47M10x Block Diagram
Revision 1.0 (05-13-05)
4
PRODUCT PREVIEW
SMSC LPC47M10x
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