LPC47M102S-MS Ver la hoja de datos (PDF) - SMSC -> Microchip

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LPC47M102S-MS

100 Pin Enhanced Super I/O Controller with LPC Interface for Consumer Applications

SMSC -> Microchip 

All GPIOs listed above are for PME wakeup as a GPIO (or alternate function). Note that GP32 and GP33 cannot be

used for wakeup under VTR power (VCC=0) since these are the fan control pins which come up as outputs and low

following a VCC POR and Hard Reset. GP53 cannot be used for wakeup under VTR power since this is the IRTX pin

which comes up as output and low following a VTR POR, a VCC POR and Hard Reset. Also, GP32 and GP33 revert

to their non-inverting GPIO output function when VCC is removed from the part. GP43 reverts to the basic GPIO

function when VCC is removed from the part, but its programmed input/output, invert/non-invert and output buffer

type is retained.

The other GPIOs function as follows:

GP36, GP37 and GP40:

ƒ Buffers are powered by VCC, but in the absence of VCC they are backdrive protected. These pins do not

have input buffers into the wakeup logic that are powered by VTR.

These pins are not used for wakeup.

GP35, GP42, GP53, GP60 and GP61:

• Buffers powered by VTR.

GP35 and GP53 have IRTX as the alternate function and their output buffers are powered by VTR so that the pins

are always forced low when not used.

GP42 is the nIO_PME pin which is active under VTR.

GP60 and GP61 have LED as the alternate function and the logic is able to control the pin under VTR.

The IRTX pins (IRTX2/GP35 and GP53/TXD2 (IRTX)) are powered by VTR so that they are driven low when VCC =

0V with VTR = 3.3V. These pins will remain low following a VCC POR until serial port 2 is enabled by

setting the activate bit, at which time the pin will reflect the state of the transmit output of the Serial Port 2 block.

The following list summarizes the blocks, registers and pins that are powered by VTR.

• PME interface block

• PME runtime register block (includes all PME, SMI, GPIO, Fan and other miscellaneous registers)

• “Wake on Specific Key” logic

• LED control logic

• Fan Tachometers

• Pins for PME Wakeup:

- GP42/nIO_PME (output, buffer powered by VTR)

- nRI1 (input)

- GP50/nRI2 (input)

- GP52/RXD2 (input)

- KDAT (input)

- MDAT

- GPIOs (GP10-GP17, GP20-GP22, GP24-GP27, GP30-GP33, GP41, GP43, GP50-GP57, GP60, GP61) – all

input-only except GP53, GP60, GP61. See below.

• Other Pins

- IRTX2/GP35 (output, buffer powered by VTR)

- GP53/TXD2(IRTX) (output, buffer powered by VTR)

- GP60/LED1 (output, buffer powered by VTR)

- GP61/LED2 (output, buffer powered by VTR)

VREF Pin

The LPC47M10x has a reference voltage pin input on pin 44 of the part. This reference voltage can be connected to

either a 5V supply or a 3.3V supply. It is used for the game port. See the “GAME PORT LOGIC” section.

Maximum Current Values

See the “Operational Description” section for the maximum current values.

The maximum VTR current, ITR, is given with all outputs open (not loaded) and all inputs in a fixed state (i.e., 0V or

3.3V). The total maximum current for the part is the unloaded value PLUS the maximum current sourced by all pins

that are driven by VTR. The pins that are powered by VTR are as follows: GP42 / nIO_PME, IRTX2 / GP35,

GP53/TXD2(IRTX) GP60 / LED1, GP61 / LED2. These pins, if configured as push-pull outputs, will source a

minimum of 6mA at 2.4V when driving.

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