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3509

Dual 36V, 700mA Step-Down Regulator

Linear Technology 

LT3509

APPLICATIONS INFORMATION

Hot Plugging Considerations

The small size, reliability and low impedance of ceramic

capacitors make them attractive for the input capacitor.

Unfortunately they can be hazardous to semiconductor

devices if combined with an inductive supply loop and a

fast power transition such as through a mechanical switch

or connector. The low loss ceramic capacitor combined

with the just a small amount of wiring inductance forms

an underdamped resonant tank circuit and the voltage at

the VIN pin of the LT3509 can ring to twice the nominal

input voltage. See Linear Technology Application Note 88

for more details.

PCB Layout and Thermal Design

The PCB layout is critical to both the electrical and thermal

performance of the LT3509. Most important is the connec-

tion to the Exposed Pad which provides the main ground

connection and also a thermal path for cooling the chip.

This must be soldered to a topside copper plane which

is also tied to backside and/or internal plane(s) with an

array of thermal vias.

To obtain the best electrical performance particular

attention should be paid to keeping the following current

paths short:

• The loop from the VIN pin through the input capacitor

back to the ground pad and plane. This sees high di/dt

transitions as the power switches turn on and off. Ex-

cess impedance will degrade the minimum usable input

voltage and could cause crosstalk between channels.

• The loops from the switch pins to the catch diodes and

back to the DA pins. The fast changing currents and

voltage here combined with long PCB traces will cause

ringing on the switch pin and may result in unwelcome

EMI.

• The loop from the regulated outputs through the output

capacitor back to the ground plane. Excess impedance

here will result in excessive ripple at the output.

The area of the SW and BOOST nodes should as small as

possible. Also the feedback components should be placed

as close as possible to the FB pins so that the traces are

short and shielded from the SW and BOOST nodes by the

ground planes.

Figure 13 shows a detail view of a practical board layout

showing just the top layer. The complete board is somewhat

larger at 7.5cm × 7.5cm. The device has been evaluated

on this board in still air running at 700kHz switching fre-

quency. One channel was set to 5V and the other to 3.3V

and both channels were fully loaded to 700mA. The device

temperature reached approximately 15°C above ambient

for input voltages below 12V. At 24V input it was slightly

higher at 17°C above ambient.

Figure 13. Sample PCB Layout (Top Layer Only)

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