LT3684EDD Ver la hoja de datos (PDF) - Linear Technology
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LT3684EDD Datasheet PDF : 24 Pages
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APPLICATIONS INFORMATION
L1
VOUT
C2
RRT
CC
LT3684
RC
R2
R1
D1
C1
GND
RPG
VIAS TO LOCAL GROUND PLANE
VIAS TO VOUT
VIAS TO RUN/SS
VIAS TO PG
3684 F08
VIAS TO VIN
OUTLINE OF LOCAL
GROUND PLANE
Figure 8. A Good PCB Layout Ensures Proper, Low EMI Operation
Hot Plugging Safely
The small size, robustness and low impedance of ceramic
capacitors make them an attractive option for the input
bypass capacitor of LT3684 circuits. However, these capaci-
tors can cause problems if the LT3684 is plugged into a
live supply (see Linear Technology Application Note 88 for
a complete discussion). The low loss ceramic capacitor,
combined with stray inductance in series with the power
source, forms an under damped tank circuit, and the
voltage at the VIN pin of the LT3684 can ring to twice the
nominal input voltage, possibly exceeding the LT3684’s
rating and damaging the part. If the input supply is poorly
controlled or the user will be plugging the LT3684 into an
energized supply, the input network should be designed
to prevent this overshoot. Figure 9 shows the waveforms
that result when an LT3684 circuit is connected to a 24V
supply through six feet of 24-gauge twisted pair. The
first plot is the response with a 4.7µF ceramic capacitor
at the input. The input voltage rings as high as 50V and
the input current peaks at 26A. A good solution is shown
in Figure 9b. A 0.7Ω resistor is added in series with the
input to eliminate the voltage overshoot (it also reduces
the peak input current). A 0.1µF capacitor improves high
frequency filtering. For high input voltages its impact on
efficiency is minor, reducing efficiency by 1.5 percent for
a 5V output at full load operating from 24V.
High Temperature Considerations
The PCB must provide heat sinking to keep the LT3684
cool. The Exposed Pad on the bottom of the package must
be soldered to a ground plane. This ground should be tied
to large copper layers below with thermal vias; these lay-
ers will spread the heat dissipated by the LT3684. Place
additional vias can reduce thermal resistance further. With
these steps, the thermal resistance from die (or junction)
to ambient can be reduced to θJA = 35°C/W or less. With
100 LFPM airflow, this resistance can fall by another 25%.
Further increases in airflow will lead to lower thermal re-
sistance. Because of the large output current capability of
the LT3684, it is possible to dissipate enough heat to raise
the junction temperature beyond the absolute maximum of
125°C. When operating at high ambient temperatures, the
3684f
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