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LT3781 Datasheet PDF : 20 Pages
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LT3781
APPLICATIO S I FOR ATIO
Events that trigger a GFC are:
a) Exceeding the current limit of the 5VREF pin
b) Detecting an undervoltage condition on VCC
c) Detecting an undervoltage condition on 5VREF
d) Pulling the SHDN pin below the shutdown threshold
e) Exceeding the 1.25V fault detector threshold on
either the OVLO or THERM pins
OVLO and THERM pins is used to directly trigger a GFC. If
either of these pins are not used, they can be disabled by
connecting the pin to ground. The intention of the OVLO
pin is to allow the monitoring of the input supply to protect
from an overvoltage condition though the use of a resistor
divider from the input supply. Monitoring of system tem-
perature (THERM) is possible through use of a resistor
divider using a thermistor as a divider component. The
5VREF pin can provide the precision supply required for
these applications. When these fault detection circuits are
disabled during shutdown or VCC pin UVLO conditions, a
reduction in OVLO and THERM pin input impedance to
ground will occur. To prevent excessive pin input currents,
low impedance pull-up devices must not be used on these
pins.
Undervoltage Lockout
The LT3781 maintains a low current operational mode
when an undervoltage condition is detected on the VCC
supply pin, or when VCC is below the undervoltage lockout
(UVLO) threshold. During a UVLO condition on the VCC
pin, the LT3781 disables all internal functions with the
exception of the shutdown and UVLO circuitry. The exter-
nal 5VREF supply is also disabled during this condition.
Disabling of all switching control circuity reduces the
LT3781 supply current to <1mA, making for efficient
integration of trickle charging in systems that employ
output feedback supply generation.
The function of the high side switch output (TG) is also
gated by UVLO circuitry monitoring the bootstrap supply
(VBST – BSTREF). Switching of the TG pin is disabled until
the voltage across the bootstrap supply is greater than
7.4V. This helps prevent the possibility of forcing the high
side switch into a linear operational region, potentially
causing excessive power dissipation due to inadequate
gate drive during start-up.
Error Amplifer Configurations
The converter output voltage information is fed back to the
LT3781 onto the VFB pin where it is transformed into an
output current control voltage by the error amplifier. The
error amplifier is generally configured as an integrator and
is used to create the dominant pole for the main converter
feedback loop. The LT3781 error amplifier is a true high
gain voltage amplifier. The amplifier noninverting input is
internally referenced to 1.25V; the inverting input is the
VFB pin and the output is the VC pin. Because both low
frequency gain and integrator frequency characteristics
can be controlled with external components, this amplifier
allows far greater flexibility and precision compared with
use of a transconductance error amplifier.
In a nonisolated converter configuration where a resistor
divider is used to program the desired output voltage, the
error amplifier can be configured as a simple active
integrator, forming the system dominant pole ( Figure␣ 1).
Placing a capacitor CERR from the VFB pin to the VC pin will
set the single-pole crossover frequency at (2πRFBCERR)-1.
Additional poles and zeros can be added by increasing the
complexity of the RC network.
VOUT
RFB
VFB
9
CERR
VC
10
LT3781
1.25V
3781 F01
Figure 1. Nonisolated Error Amp Configuration
3781f
11

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