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LT5511 Ver la hoja de datos (PDF) - Linear Technology

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componentes Descripción
Lista de partido
LT5511
Linear
Linear Technology Linear
LT5511 Datasheet PDF : 16 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
LT5511
PI FU CTIO S
LO, LO+ (Pins 1, 16): Differential Inputs for the Local
Oscillator Signal. They can also be driven single-ended by
connecting one to an RF ground through a DC blocking
capacitor. For single-ended drive, use LO+ for the signal
input, as this results in less interference from unwanted
coupling of the LO signal to other pins. These pins are
internally biased to about 1.4V; thus, DC blocking capaci-
tors are required. An impedance transformation is re-
quired to match the LO input to 50(or 75). At frequen-
cies below 1.5GHz this input can be resistively matched
with a shunt resistor.
NC (Pins 2, 9): Not Connected Internally. Connect to
ground for improved isolation between pins.
GND (Pins 3, 6, 8,11, 14): Internal Grounds. These pins
are used to improve isolation and are not intended as DC
or RF grounds for the IC. Connect these pins to ground for
best performance.
IF+, IF(Pins 4, 5): Differential Inputs for the IF Signal. A
differential signal must be applied to these pins. These
pins are internally biased to about 1.2V, and thus require
DC blocking capacitors. These pins should be DC isolated
from each other for best LO suppression. Imbalances in
amplitude or phase between these two signals will de-
grade the linearity of the mixer.
VCCBIAS (Pin 7): Supply Voltage for the LO Buffer Bias and
Enable Circuits. This pin should be connected to VCC and
have appropriate RF bypass capacitors. Care should be
taken to ensure that RF signal leakage to the VCC line is
minimized.
EN (Pin 10): Chip Enable/Disable. When the applied volt-
age is greater than 3V, the IC is enabled. When the applied
voltage is less than 0.5V, the IC is disabled and the DC
current drops to about 1µA. Under no conditions should
the voltage on this pin exceed VCC + 0.3V, even at power
on.
RF, RF+ (Pins 12, 13): Differential Outputs for the RF
Output Signal. An impedance transformation may be
required to match the outputs. These pins are also used to
connect the mixer to the DC supply through impedance-
matching inductors, RF chokes or transformer center-tap.
Care should be taken to ensure that the RF signal leakage
to VCCLO and VCCBIAS is minimized.
VCCLO (Pin 15): Supply Voltage for the LO Buffer Ampli-
fier. This pin should be connected to VCC and have appro-
priate RF bypass capacitors. Care should be taken to
ensure that RF signal leakage to the VCC line is minimized.
GROUND (Backside Contact) (Pin 17): DC and RF Ground
Return for the Entire IC. This contact must be connected
to a low impedance ground plane for proper operation.
BLOCK DIAGRA
LO
LO+
1
16
8
NC 2
GND 3
IF+ 4
IF5
GND 6
VCCBIAS 7
LO
BUFFER
BIAS
CIRCUITS
8
17
9
GND GND NC
(BACKSIDE)
15 VCCLO
14 GND
13 RF+
12 RF
11 GND
10 EN
5511 BD
5511f

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