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LTC2206 Ver la hoja de datos (PDF) - Linear Technology

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componentes Descripción
Lista de partido
LTC2206
Linear
Linear Technology Linear
LTC2206 Datasheet PDF : 32 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
LTC2207/LTC2206
TIMING CHARACTERISTICS The denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. (Note 4)
SYMBOL PARAMETER
fS
Sampling Frequency
tL
ENC Low Time
tH
ENC High Time
tAP
tD
tC
tSKEW
tOE
Pipeline
Latency
Sample-and-Hold
Aperture Delay
ENC to DATA Delay
ENC to CLKOUT Delay
DATA to CLKOUT Skew
DATA Access time
Bus Relinquish time
CONDITIONS
(Note 9)
Duty Cycle Stabilizer Off (Note 7)
Duty Cycle Stabilizer On (Note 7)
Duty Cycle Stabilizer Off (Note 7)
Duty Cycle Stabilizer On (Note 7)
(Note 7)
(Note 7)
(tC-tD) (Note 7)
CL = 5pF (Note 7)
(Note 7)
LTC2206
MIN TYP MAX
1
80
5.94 6.25 500
4.06 6.25 500
5.94 6.25 500
4.06 6.25 500
–0.7
LTC2207
MIN TYP MAX
1
105
4.52 4.762 500
3.10 4.762 500
4.52 4.762 500
3.10 4.762 500
–0.7
UNITS
MHz
ns
ns
ns
ns
ns
1.3
2.7
1.3
2.7
–0.6
0
5
5
7
4
1.3 2.7
4
1.3 2.7
0.6 –0.6 0
15
5
15
5
7
4
ns
4
ns
0.6
ns
15
ns
15
ns
Cycles
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All voltage values are with respect to GND, with GND and OGND
shorted (unless otherwise noted).
Note 3: When these pin voltages are taken below GND or above VDD, they
will be clamped by internal diodes. This product can handle input currents
of greater than 100mA below GND or above VDD without latchup.
Note 4: VDD = 3.3V, fSAMPLE = 105MHz (LTC2207), 80MHz (LTC2206)
differential ENC+/ENC= 2VP-P sine wave with 1.6V common mode,
input range = 2.25VP-P with differential drive (PGA = 0), unless otherwise
specified.
Note 5: Integral nonlinearity is defined as the deviation of a code from a
“best fit straight line” to the transfer curve. The deviation is measured from
the center of the quantization band.
Note 6: Offset error is the offset voltage measured from –1/2LSB when the
output code flickers between 0000 0000 0000 0000 and 1111 1111 1111
1111 in 2’s complement output mode.
Note 7: Guaranteed by design, not subject to test.
Note 8: VDD = 3.3V, fSAMPLE = 105MHz (LTC2207) or 80MHz (LTC2206),
input range = 2.25VP-P with differential drive.
Note 9: Recommended operating conditions.
Note 10: The dynamic current of the switched capacitors analog inputs
can be large compared to the leakage current and will vary with the sample
rate.
Note 11: Leakage current will have higher transient current at power up.
Keep drive resistance at or below 1Kohm.
TIMING DIAGRAM
6
ANALOG
INPUT
ENC
ENC+
D0-D15, OF
CLKOUT+
CLKOUT
tAP
N+1
N
tH
tL
N+2
N+3
N+4
tD
N–7
tC
N–6
N–5
N–4
N–3
22076 TD01
22076fa

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