LX1663 Ver la hoja de datos (PDF) - Microsemi Corporation
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LX1663 Datasheet PDF : 15 Pages
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PRODUCT DATABOOK 1996/1997
LX1662/62A, LX1663/63A
SINGLE-CHIP PROGRAMMABLE PWM CONTROLLERS WITH 5-BIT DAC
PRODUCTION DATA SHEET
USING THE LX1662/63 DEVICES
LAYOUT GUIDELINES - THERMAL DESIGN
A great deal of time and effort were spent optimizing the thermal
design of the demo boards. Any user who intends to implement
an embedded motherboard would be well advised to carefully
read and follow these guidelines. If the FET switches have been
carefully selected, external heatsinking is generally not required.
However, this means that copper trace on the PC board must now
be used. This is a potential trouble spot; as much copper area as
possible must be dedicated to heatsinking the FET switches, and
the diode as well if a non-synchronous solution is used.
In our VRM module, heatsink area was taken from internal
ground and VCC planes which were actually split and connected
with VIAS to the power device tabs. The TO-220 and TO-263
cases are well suited for this application, and are the preferred
packages. Remember to remove any conformal coating from all
exposed PC traces which are involved in heatsinking.
Input
5V or 12V
LX166x
Output
FIGURE 13 — Power Traces
General Notes
As always, be sure to provide local capacitive decoupling close to
the chip. Be sure use ground plane construction for all high-
frequency work. Use low ESR capacitors where justified, but be
alert for damping and ringing problems. High-frequency designs
demand careful routing and layout, and may require several
iterations to achieve desired performance levels.
Power Traces
To reduce power losses due to ohmic resistance, careful consid-
eration should be given to the layout of traces that carry high
currents. The main paths to consider are:
I Input power from 5V supply to drain of top MOSFET.
I Trace between top MOSFET and lower MOSFET or Schottky
diode.
I Trace between lower MOSFET or Schottky diode and
ground.
I Trace between source of top MOSFET and inductor, sense
resistor and load.
All of these traces should be made as wide and thick as
possible, in order to minimize resistance and hence power losses.
It is also recommended that, whenever possible, the ground, input
and output power signals should be on separate planes (PCB
layers). See Figure 13 – bold traces are power traces.
C5 Input Decoupling (VCC) Capacitor
Ensure that this 1µF capacitor is placed as close to the IC as
possible to minimize the effects of noise on the device.
Layout Assistance
Please contact Linfinity’s Applications Engineers for assistance
with any layout or component selection issues. A Gerber file
with layout for the most popular devices is available upon re-
quest.
Evaluation boards are also available upon request. Please
check Linfinity's web site for further application notes.
RELATED DEVICES
LX1664/1665 - Dual Output PWM for µProcessor Applications
LX1668 - Triple Output PWM for µProcessor Applications
LX1553 - PWM for 5V - 3.3V Conversion
Copyright © 1999
Rev. 1.2a, 11/04
Pentium is a registered trademark of Intel Corporation.
Cyrix is a registered trademark and 6x86, Gx86 and M2 are trademarks of Cyrix Corporation. K6 is a trademark of AMD.
Power PC is a trademark of International Business Machines Corporation. Alpha is a trademark of Digital Equipment Corporation.
PRODUCTION DATA - Information contained in this document is proprietary to LinFinity, and is current as of publication date. This document
may not be modified in any way without the express written consent of LinFinity. Product processing does not necessarily include testing of
all parameters. Linfinity reserves the right to change the configuration and performance of the product and to discontinue product at any time.
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