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LTC1685CS8 Ver la hoja de datos (PDF) - Linear Technology

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LTC1685CS8 Datasheet PDF : 12 Pages
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LTC1685
DC ELECTRICAL CHARACTERISTICS The q denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VDD = 5V ±5%, unless otherwise noted. (Notes 2, 3)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
IOSD2
Driver Short-Circuit Current, VOUT = LOW
VOUT = – 7V or 10V (Note 5) q
20
mA
IOSR
Receiver Short-Circuit Current
VOUT = 0V or VDD (Note 5)
q
20
mA
RIN
Input Resistance
– 7V VCM 12V
q
22
k
CIN
Input Capacitance
A, B Inputs, D, DE, RE
3
pF
Open-Circuit Input Voltage, Figure 5
VDD = 5V (Note 4)
q
3.2
3.3
3.4
V
Fail-Safe Time Time to Detect Fail-Safe Condition
2
µs
CMRR
Receiver Input Common Mode Rejection Ratio VCM = 2.6V, f = 26MHz
CLOAD
Receiver and Driver Output Load Capacitance (Note 4)
q
45
dB
500
pF
U
SWITCHING CHARACTERISTICS The q denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VDD = 5V, unless otherwise noted. (Notes 2, 3)
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
tPLH, tPHL Driver Input-to-Output
Propagation Delay
RDIFF = 54, CL1 = CL2 = 100pF, Figures 3, 5,
LTC1685C
q
15
18.5
22
LTC1685I
q
13
18.5
25
tSKEW
Driver Output A-to-Output
RDIFF = 54, CL1 = CL2 = 100pF,
500
B Skew
Figures 3, 5
tr, tf
Driver Rise/Fall Time
RDIFF = 54, CL1 = CL2 = 100pF,
3.5
Figures 3, 5
tZH
tZL
tLZ
t HZ
tPLH, tPHL
Driver Enable to Output High
Driver Enable to Output Low
Driver Disable from Low
Driver Disable from High
Receiver Input-to-Output
Propagation Delay
CL = 100pF, S2 Closed, Figures 4, 6
CL = 100pF, S1 Closed, Figures 4, 6
CL = 15pF, S1 Closed, Figures 4, 6
CL = 15pF, S2 Closed, Figures 4, 6
CL = 15pF, Figures 3, 7
LTC1685C
LTC1685I
q
25
50
q
25
50
q
25
50
q
25
50
q
15
18.5
22
q
13
18.5
25
tSQD
Receiver Skew tPLH – tPHLCL = 15pF, Figures 3, 7
500
tZL
Receiver Enable to Output Low CL = 15pF, S1 Closed, Figures 2, 8
q
25
50
tZH
Receiver Enable to Output High CL = 15pF, S2 Closed, Figures 2, 8
q
25
50
tLZ
Receiver Disable from Low
CL = 15pF, S1 Closed, Figures 2, 8
q
25
50
t HZ
Receiver Disable from High
CL = 15pF, S2 Closed, Figures 2, 8
q
25
50
Maximum Receiver Input
(Note 4)
q
2000
Rise/Fall Times
tPKG-PKG Package-to-Package Skew
Minimum Input Pulse Width
Same Temperature (Note 4)
VDD = 5V ± 5% (Note 4)
LTC1685C
LTC1685I
1.5
q
17
19.2
q
20
25
Maximum Data Rate
VDD = 5V ± 5% (Note 4)
LTC1685C
LTC1685I
q
52
60
q
40
50
Maximum Input Frequency
VDD = 5V ± 5% (Note 4)
LTC1685C
LTC1685I
q
26
30
q
20
25
UNITS
ns
ns
ps
ns
ns
ns
ns
ns
ns
ns
ps
ns
ns
ns
ns
ns
ns
ns
ns
Mbps
Mbps
MHz
MHz
3

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