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M30623MCT

SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

Mitsumi 

dUevnedleorpment

Tentative Specifications REV.A

Specifications in this manual are

tentative

and

subject

to

change.

Mitsubishi microcomputers

M16C / 62T Group

Memory

SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

Operation of Functional Blocks

The M16C/62T group accommodates certain units in a single chip. These units include ROM and RAM to

store instructions and data and the central processing unit (CPU) to execute arithmetic/logic operations.

Also included are peripheral units such as timers, serial I/O, D-A converter, DMAC, CRC calculation circuit,

A-D converter, and I/O ports.

The following explains each unit.

Memory

Figure 1.4.1 is a memory map of the M16C/62T group. The address space extends the 1M bytes from

address 0000016 to FFFFF16.

Internal ROM is located as the following, in M30623M4T-XXXGP from address F800016 to FFFFF16 (32K

bytes), in M30622M8T/M8V-XXXFP and M30623M8T/M8V-XXXGP from address F000016 to FFFFF16

(64K bytes), in M30622MCT/MCV-XXXFP and M30623MCT/MCV-XXXGP from address E000016 to

FFFFF16 (128K bytes).

_______

The vector table for fixed interrupts such as the reset and NMI are mapped to FFFDC16 to FFFFF16. The

starting address of the interrupt routine is stored here. The address of the vector table for timer interrupts,

etc., can be set as desired using the internal register (INTB). See the section on interrupts for details.

Internal RAM is located as the following, in M30623M4T-XXXGP from address 0040016 to 00FFF16 (3K

bytes), in M30622M8T/M8V-XXXFP and M30623M8T/M8V-XXXGP from address 0040016 to 013FF16 (4K

bytes), in M30622MCT/MCV-XXXFP and M30623MCT/MCV-XXXGP from address 0040016 to 017FF16

(5K bytes). In addition to storing data, the RAM also stores the stack used when calling subroutines and

when interrupts are generated.

The SFR area is mapped to 0000016 to 003FF16. This area accommodates the control registers for

peripheral devices such as I/O ports, A-D converter, serial I/O, and timers, etc. Figures 1.7.1 to 1.7.3 are

location of peripheral unit control registers. Any part of the SFR area that is not occupied is reserved and

cannot be used for other purposes.

The special page vector table is mapped to FFE0016 to FFFDB16. If the starting addresses of subroutines

or the destination addresses of jumps are stored here, subroutine call instructions and jump instructions

can be used as 2-byte instructions, reducing the number of program steps.

In memory expansion mode and microprocessor mode, a part of the spaces are reserved and cannot be

used. For example, in the M30623MCT/MCV-XXXGP, the following spaces cannot be used.

• The space between 0100016 and 03FFF16 (Memory expansion and microprocessor modes)

• The space between D000016 and D7FFF16 (Memory expansion mode)

But the M16C/62T group is not guaranteed to operate in memory expansion and microprocessor modes.

0000016

SFR area

For details, see Figures

1.7.1 to 1.7.3

0040016

XXXXX16

0400016

Internal RAM area

Internal reserved area

(Note 1)

External area

D000016 Internal reserved area

(Note 1)

YYYYY16

Internal RAM area

FFFFF16

Figure 1.4.1. Memory map

FFE0016

Special page

vector table

FFFDC16 Undefined instruction

Overflow

BRK instruction

Address match

Single step

Watchdog timer

DBC

FFFFF16

NMI

Reset

Note 1. In memory expansion and microprocessor modes,

can not be used.

Note 2. In memory expansion mode, can not be used.

Note 3. The M16C/62T group is not guaranteed to operate

in memory expansion and microprocessor modes.

Type No.

XXXXX16 YYYYY16

M30623M4T-XXXGP

00FFF16 F800016

M30622M8T/M8V-XXXFP

013FF16 F000016

M30623M8T/M8V-XXXGP

M30622MCT/MCV-XXXFP

017FF16 E000016

M30623MCT/MCV-XXXGP

11

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