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M37516

Single chip 8-bit microcomputer

Mitsumi 

MULTI-MASTER I2C-BUS BUS LINE CHARACTERISTICS

Table 21 Multi-master I2C-BUS bus line characteristics

Symbol

tBUF

Bus free time

Parameter

Standard clock mode High-speed clock mode

Min.

Max.

Min.

Max.

Unit

4.7

1.3

µs

tHD;STA

Hold time for START condition

4.0

0.6

µs

tLOW

Hold time for SCL clock = “0”

4.7

1.3

µs

tR

tHD;DAT

Rising time of both SCL and SDA signals

Data hold time

1000 20+0.1Cb

300

ns

0

0

0.9

µs

tHIGH

Hold time for SCL clock = “1”

4.0

0.6

µs

tF

tSU;DAT

Falling time of both SCL and SDA signals

Data setup time

300

20+0.1Cb

300

ns

250

100

ns

tSU;STA

Setup time for repeated START condition

4.7

0.6

µs

tSU;STO

Setup time for STOP condition

Note: Cb = total capacitance of 1 bus line

4.0

0.6

µs

SDA

tBUF

tLOW

tR

tF

SCL P

S

tHD:STA

Sr

tHD:STA

tHD:DAT

tHIGH

tsu:DAT

tsu:STA

Fig. 55 Timing diagram of multi-master I2C-BUS

tsu:STO

P

S : START condition

Sr : RESTART condition

P : STOP condition

M37516M6-XXXHP

GNOK-M37516M6-XXXHP-50

(MSETSU 2)

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