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MAS6116

Stereo Digital Volume Control

Micro Analog systems 

GENERAL DESCRIPTION

DA6116.001

27 February, 2009

Main features

MAS6116 is a stereo digital volume control designed for audio systems. The levels of the left and right analog

channels are set by the serial interface. Both channels can be programmed independently. The channel gains can

be programmed from -111.5 dB to +15.5 dB with 0.5 dB resolution. The code for -112 dB (00HEX) activates mute

for maximum attenuation. MAS6116 operates from single +5V supply and accepts analog input signal levels up to

±18V.

MAS6116 has a zero cross detect function that changes the channel gain only when a zero crossing has been

detected in the input signal. This eliminates clicking sounds from the output signal when the gain is changed. The

zero cross detection circuit is also equipped with a timeout function to make sure the gain value is updated even

when there is no input signal.

Channel gains can also be changed instantly without using the zero cross detect function. This can be done with

dedicated instant gain change commands specified in Register Description on page 7. Using this feature to

change channel gains in large increments is not recommended because it may cause large transients in the

output signal. See chapter Changing the gain of the channels and chapter Write operation status register for

further details.

The XMUTE pin in MAS6116 always uses the zero cross detection and timeout functions when entering to or

returning from the MUTE state. This prevents fast transients from occurring in the output signal.

Serial interface

Control information is written into or read back from the internal register via the serial control port. Serial control

port consists of a bi-directional pin for data (DATA), chip select pin (XCS) and control clock (CCLK) and supports

the serial communication protocol. All control instructions require two bytes of data.

To shift the data in CCLK must be pulsed 16 times when XCS is low. The data is shifted into the serial input

register on the rising edges of CCLK pulses. The first 8 bits contain address information. The second byte

contains the control word. XCS must return to high after the second byte. That is, after the 16th CCLK XCS must

be returned to high. See chapter Serial interface timing diagram on page 12.

The same process takes place for reading the information. XCS will remain low for next 16 CCLK pulses. The

data is shifted out on the falling edges of CCLK. When XCS is high, the DATA pin is in high impedance state,

which enables DATA pins of other devices to be connected together.

On the PCB board the same DATA and CCLK lines can be routed to every MAS6116 chip. If the XCS-pin is not

active (low), DATA pin of that chip is in high-impedance state. This allows using a simple PCB board for multi-

channel audio systems.

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