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MAX16936

36V, 220kHz to 2.2MHz Step-Down Converter with 28µA Quiescent Current

Maxim Integrated 

MAX16936

36V, 220kHz to 2.2MHz Step-Down Converter

with 28µA Quiescent Current

When COUT is composed of “n” identical capacitors in

parallel, the resulting COUT = n O COUT(EACH), and ESR

= ESR(EACH)/n. Note that the capacitor zero for a paral-

lel combination of alike capacitors is the same as for an

individual capacitor.

The feedback voltage-divider has a gain of GAINFB = VFB/

VOUT, where VFB is 1V (typ). The transconductance error

amplifier has a DC gain of GAINEA(dc) = gm,EA O ROUT,EA,

where gm,EA is the error amplifier transconductance,

which is 700FS (typ), and ROUT,EA is the output resis-

tance of the error amplifier 50MI.

A dominant pole (fdpEA) is set by the compensation

capacitor (CC) and the amplifier output resistance

(ROUT,EA). A zero (fzEA) is set by the compensation

resistor (RC) and the compensation capacitor (CC).

There is an optional pole (fpEA) set by CF and RC to

cancel the output capacitor ESR zero if it occurs near

the cross over frequency (fC, where the loop gain equals

1 (0dB)). Thus:

fdpEA

=

2π × CC

1

× (ROUT,EA

+ RC)

fzEA

=

1

2π × CC

×RC

fpEA

=

1

2π × CF

×RC

The loop-gain crossover frequency (fC) should be set

below 1/5th of the switching frequency and much higher

than the power-modulator pole (fpMOD):

fpMOD

<<

fC

≤

fSW

5

The total loop gain as the product of the modulator gain,

the feedback voltage-divider gain, and the error amplifier

gain at fC should be equal to 1. So:

GAINMOD(fC)

×

VFB

VOUT

× GAINEA(fC)

= 1

GAINE= A(fC) gm, EA × RC

G= AINMOD(fC)

GAINMOD(dc)

×

fpMOD

fC

Therefore:

GAINMOD(fC)

×

VFB

VOUT

×

gm,EA

×RC

= 1

Maxim Integrated

Solving for RC:

RC

=

g m, EA

×

VOUT

VFB × GAINMOD(fC)

Set the error-amplifier compensation zero formed by RC

and CC (fzEA) at the fpMOD. Calculate the value of CC a

follows:

CC

=

2π ×

1

fpMOD

×RC

If fzMOD is less than 5 x fC, add a second capacitor,

CF, from COMP to GND and set the compensation pole

formed by RC and CF (fpEA) at the fzMOD. Calculate the

value of CF as follows:

CF

=

1

2π × fzMOD

×RC

As the load current decreases, the modulator pole

also decreases; however, the modulator gain increases

accordingly and the crossover frequency remains the

same.

PCB Layout Guidelines

Careful PCB layout is critical to achieve low switching

losses and clean, stable operation. Use a multilayer board

whenever possible for better noise immunity and power

dissipation. Follow these guidelines for good PCB layout:

1) Use a large contiguous copper plane under the IC

package. Ensure that all heat-dissipating components

have adequate cooling. The bottom pad of the IC

must be soldered down to this copper plane for effec-

tive heat dissipation and for getting the full power out

of the IC. Use multiple vias or a single large via in this

plane for heat dissipation.

2) Isolate the power components and high current path

from the sensitive analog circuitry. Doing so is essential

to prevent any noise coupling into the analog signals.

3) Keep the high-current paths short, especially at the

ground terminals. This practice is essential for stable,

jitter-free operation. The high-current path composed

of the input capacitor, high-side FET, inductor, and

the output capacitor should be as short as possible.

4) Keep the power traces and load connections short. This

practice is essential for high efficiency. Use thick cop-

per PCBs (2oz vs. 1oz) to enhance full-load efficiency.

5) The analog signal lines should be routed away from

the high-frequency planes. Doing so ensures integrity

of sensitive signals feeding back into the IC.

  14

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