MAX2306ETI Ver la hoja de datos (PDF) - Maxim Integrated
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MAX2306ETI Datasheet PDF : 20 Pages
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CDMA IF VGAs and I/Q Demodulators
with VCO and Synthesizer
Table 1. MAX2306 Control Register States
M
M
L
PINS S
CONTROLS REGISTER
S
B
B
B
OPERATIONAL
MODE
ACTION
RESULT
SHUTDOWN
SHUTDOWN
STANDBY
CDMA
CDMA
FM_IQ
FM_IQ
FM_I
FM_I
Shutdown pin completely
powers down the chip
0 in shutdown register bit leaves
serial port active
0 in standby register bit turns off
VGA and modulator only
Mode pin overrides VCO_SEL,
DIVSEL, and IN_SEL to high
Floating mode pin returns control
to register
Mode pin overrides VCO_SEL,
DIVSEL, and IN_SEL to low
Floating mode pin returns control
to register
Mode pin overrides VCO_SEL,
DIVSEL, and IN_SEL to low
Floating pins return control to
register
LXXXXXXXXXXXXXX
HX X X X X X X X X X X X X 0
HX X X 0
XX
01
HH
0
X
XXXXX11
HF
0
1
1XXX111
HL
0
X
XXX0X11
HF
0
XX0011
HL
H
L
F
0
X
XXX1X11
0
XX1011
Note: H = high, L = low, F = floating pin, X = don’t care, Blank = independent parameter, 1 = logic high, 0 = logic low.
The appropriate latch outputs provide I and Q signals
at the desired LO frequency.
Synthesizer
The VCO’s output frequency is controlled by an internal
phase-locked-loop (PLL) dual-modulus synthesizer. The
loop filter is off-chip to simplify loop design for emerg-
ing applications. The tunable resonant network is also
off-chip for maximum Q and for system design flexibili-
ty. The VCO output frequency is divided down to the
desired comparison frequency with the M counter. The
M counter consists of a 4-bit A swallow counter and a
10-bit P counter. A reference signal is provided from an
external source and is divided down to the comparison
frequency with the R counter. The two divided signals
are compared with a three-state digital phase-frequen-
cy detector. The phase-detector output drives a
charge-pump as well as lock-detect logic and tur-
bocharge control logic. The charge-pump output
(CP_OUT) pin is processed by the loop filter and drives
the tunable resonant network, altering the VCO frequen-
cy and closing the loop.
Multimode applications are supported by two indepen-
dent programmable registers each for the M counter
(M1, M2), the R counter (R1, R2), and the charge-pump
output current magnitude (CP1, CP2). The DIVSEL (DS)
bit selects which set of registers is used. It can be over-
ridden by the MAX2306’s MODE pin or the MAX2309’s
DIVSEL pin. Programming these registers is discussed
in the 3-Wire Interface and Registers section.
10 ______________________________________________________________________________________
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