MB88161 Ver la hoja de datos (PDF) - Fujitsu

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MB88161

Spread Spectrum Clock Generator

Fujitsu 

MB88161

■ LOCK-UP TIME

VDD

XIN

2.7 V

Oscillation

stabilization wait time

VIH

OE

Setting pin VIH

S1, S0,

MLTP, SPRD

OUT

tLK

(lock-up time )

The clock stabilization wait time is required when the power is turned on.

If the OE pin is fixed at “H” level, the maximum time after the power is turned on until the required clock is obtained

is (the stabilization wait time of input clock to XIN pin) + (the lock-up time “tLK”) .

For the stabilization wait time of input clock to the XIN pin, check the characteristics of the resonator or oscillator

used.

VDD

2.7 V

Oscillation

stabilization wait time

XIN

OE

Setting pin VIH

S1, S0,

MLTP, SPRD

OUT

VIH

tLK

(lock-up time )

If the OE pin is used for power down control, the required clock is obtained at most the lock-up time “tLK” after the

OE pin goes “H” level.

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