MB90860A Ver la hoja de datos (PDF) - Fujitsu
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MB90860A Datasheet PDF : 62 Pages
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MB90860A Series
Pin No.
LQFP100*2 QFP100*1
Pin name
Circuit
type
Function
General purpose I/O. The register can be set to select whether
P15
to use a pull-up resistor. This function is enabled in single-chip
mode.
92
94
AD13
G I/O pin for bit 13 of the external address/data bus.
This function is enabled when the external bus is enabled.
SIN4
Serial data input pin for UART4 (MB90V340 only)
General purpose I/O. The register can be set to select whether
P16
to use a pull-up resistor. This function is enabled in single-chip
mode.
93
95
AD14
G I/O pin for bit 14 of the external address/data bus.
This function is enabled when the external bus is enabled.
SOT4
Serial data output pin for UART4 (MB90V340 only)
General purpose I/O. The register can be set to select whether
P17
to use a pull-up resistor. This function is enabled in single-chip
mode.
94
96
AD15
G I/O pin for bit 15 of the external address/data bus. This function
is enabled when the external bus is enabled.
SCK4
Clock I/O pin for UART4 (MB90V340 only)
P20 to P23
General purpose I/O. The register can be set to select whether
to use a pull-up resistor.In external bus mode, the pin is
enabled as a general-purpose I/O port when the corresponding
bit in the external address output control register (HACR) is 1.
95 to 98 97 to 100
A16 to A19
G
Output pins for A16 to A19 of the external address bus. When
the corresponding bit in the external address output control
register (HACR) is 0, the pins are enabled as high address
output pins (A16 to A19).
PPG9,PPGB,
PPGD,PPGF
Output pins for PPGs
P24 to P27
General purpose I/O. The register can be set to select whether
to use a pull-up resistor.In external bus mode, the pin is
enabled as a general-purpose I/O port when the corresponding
bit in the external address output control register (HACR) is 1.
99 to 2
1 to 4
A20 to A23
G Output pins for A20 to A23 of the external address bus. When
the corresponding bit in the external address output control
register (HACR) is 0, the pins are enabled as high address
output pins (A20 to A23).
IN0 to IN3
Data sample input pins for input captures ICU0 to ICU3
General purpose I/O.The register can be set to select whether
P30
to use a pull-up resistor.This function is enabled in single-chip
mode.
3
5
ALE
G Address latch enable output pin. This function is enabled when
the external bus is enabled.
IN4
Data sample input pin for input capture ICU4
(Continued)
9
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