MB91233L Ver la hoja de datos (PDF) - Fujitsu
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componentes Descripción
Lista de partido
MB91233L Datasheet PDF : 66 Pages
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MB91230 Series
s PIN DESCRIPTION
Pin no.
LQFP
FLGA
1
A1
2
C2
3
C3
4
B1
5
E4
6
D2
7
C1
8
D3
Pin name Circuit type
Description
SCK2
P26
SIN3
P27
SOT3
P30
SCK3
P31
AIN0
P32
BIN0
P33
ZIN0
P34
AIN1
P35
UART2 clock input/output.
This function is valid when corresponding bit of PFR2
register is set to peripheral function.
D
General purpose input/output port.
This function is valid when corresponding bit of PFR2
register is set to port function.
UART3 data input.
When using this function, corresponding bit of DDR2
D
register is set to input.
General purpose input/output port.
This function is always valid.
UART3 data output.
This function is valid when corresponding bit of PFR3
register is set to peripheral function.
B
General purpose input/output port.
This function is valid when corresponding bit of PFR3
register is set to port function.
UART3 clock input/output.
This function is valid when corresponding bit of PFR3
register is set to peripheral function.
B
General purpose input/output port.
This function is valid when corresponding bit of PFR3
register is set to port function.
Up/down counter 0 AIN input.
When using this function, corresponding bit of DDR3
B
register is set to input.
General purpose input/output port.
This function is alwais valid.
Up/down counter 0 BIN input.
When using this function, corresponding bit of DDR3
B
register is set to input.
General purpose input/output port.
This function is always valid.
Up/down counter 0 ZIN input.
When using this function, corresponding bit of DDR3
B
register is set to input.
General purpose input/output port.
This function is always valid.
Up/down counter 1 AIN input.
When using this function, corresponding bit of DDR3
B
register is set to input.
General purpose input/output port.
This function is always valid.
(Continued)
7
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