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MC14557
(Rev.:2000)

1-to-64 Bit Variable Length Shift Register

ON Semiconductor 

MC14557B

PIN ASSIGNMENT

L2 1

L1 2

16 VDD

15 L4

RESET 3

14 L8

CLOCK 4

CE 5

13 L16

12 L32

B6

11 Q

A7

10 Q

VSS 8

9 A/B SEL

BLOCK DIAGRAM

3

RESET

4

CLOCK

5

CE

6

B

Q

10

7

A

9

A/B SELECT

2

L1

1

L2

15

L4

Q

11

14

L8

13

L16

12

L32

VDD = PIN 16

VSS = PIN 8

TRUTH TABLE

Inputs

Output

Rst A/B Clock CE

Q

0

0

0

1

0

0

0

1

1

X

0

B

0

A

1

B

1

A

X

X

0

Q is the output of the first selected shift

register stage.

X = Don’t Care

LENGTH SELECT TRUTH TABLE

L32 L16 L8 L4 L2 L1 Register Length

000000

000001

000010

000011

000100

000101





































100000

100001





































111100

111111

111110

111101

1 Bit

2 Bits

3 Bits

4 Bits

5 Bits

6 Bits







33 Bits

34 Bits







61 Bits

62 Bits

63 Bits

64 Bits

NOTE: Length equals the sum of the binary length control

subscripts plus one.

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