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74LVX540 Datasheet PDF : 8 Pages
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MC74LVX540
Octal Bus Buffer
Inverting
The MC74LVX540 is an advanced high speed CMOS inverting
octal bus buffer fabricated with silicon gate CMOS technology. It
achieves high speed operation similar to equivalent Bipolar Schottky
TTL while maintaining CMOS low power dissipation.
The MC74LVX540 features inputs and outputs on opposite sides of
the package and two AND−ed active−low output enables. When either
OE1 or OE2 are high, the terminal outputs are in the high impedance
state.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output. The
inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V
systems to 3.0 V systems.
Features
• High Speed: tPD = 5.0 ns (Typ) at VCC = 3.3 V
• Low Power Dissipation: ICC = 4 mA (Max) at TA = 25°C
• High Noise Immunity: VNIH = VNIL = 28% VCC
• Power Down Protection Provided on Inputs
• Balanced Propagation Delays
• Designed for 2.0 V to 3.6 V Operating Range
• Low Noise: VOLP = 1.2 V (Max)
• Pin and Function Compatible with Other Standard Logic Families
• Latchup Performance Exceeds 300 mA
• Chip Complexity: 124 FETs or 31 Equivalent Gates
• ESD Performance:
Human Body Model > 2000 V;
Machine Model > 200 V
• Pb−Free Packages are Available*
http://onsemi.com
MARKING
DIAGRAMS
20
1
20
SOIC−20
DW SUFFIX
CASE 751D
1
LVX540
AWLYYWW
20
1
20
TSSOP−20
DT SUFFIX
CASE 948E
1
LVX
540
ALYW
20
1
20
SOEIAJ−20
M SUFFIX
CASE 967
1
74LVX540
AWLYWW
A
L, WL
Y, YY
W, WW
= Assembly Location
= Wafer Lot
= Year
= Work Week
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2005
1
March, 2005 − Rev. 3
Publication Order Number:
MC74LVX540/D
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