MC74VHC245 Ver la hoja de datos (PDF) - Motorola => Freescale
Número de pieza
componentes Descripción
Lista de partido
MC74VHC245 Datasheet PDF : 7 Pages
| |||
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Octal Bus Transceiver
The MC74VHC245 is an advanced high speed CMOS octal bus
transceiver fabricated with silicon gate CMOS technology. It achieves high
speed operation similar to equivalent Bipolar Schottky TTL while maintaining
CMOS low power dissipation.
It is intended for two–way asynchronous communication between data
buses. The direction of data transmission is determined by the level of the
DIR input. The output enable pin (OE) can be used to disable the device, so
that the buses are effectively isolated.
All inputs are equipped with protection circuits against static discharge.
• High Speed: tPD = 4.0ns (Typ) at VCC = 5V
• Low Power Dissipation: ICC = 4µA (Max) at TA = 25°C
• High Noise Immunity: VNIH = VNIL = 28% VCC
• Power Down Protection Provided on Inputs
• Balanced Propagation Delays
• Designed for 2V to 5.5V Operating Range
• Low Noise: VOLP = 1.2V (Max)
• Pin and Function Compatible with Other Standard Logic Families
• Latchup Performance Exceeds 300mA
• ESD Performance: HBM > 2000V; Machine Model > 200V
• Chip Complexity: 308 FETs or 77 Equivalent Gates
APPLICATION NOTES
1. Do not force a signal on an I/O pin when it is an active output, damage may
occur.
2. All floating (high impedence) input or I/O pins must be fixed by means of
pull up or pull down resistors or bus terminator ICs.
3. A parasitic diode is formed between the bus and VCC terminals. Therefore,
the VHC245 cannot be used to interface 5V to 3V systems directly.
A
DATA
PORT
A1 2
A2 3
A3 4
A4 5
A5 6
A6 7
A7 8
A8 9
DIR 1
OE 19
LOGIC DIAGRAM
18 B1
17 B2
16 B3
15 B4
14 B5
13 B6
12 B7
11 B8
B
DATA
PORT
FUNCTION TABLE
Control Inputs
OE
DIR
Operation
L
L
Data Transmitted from Bus B to Bus A
L
H
Data Transmitted from Bus A to Bus B
H
X
Buses Isolated (High–Impedance State)
MC74VHC245
DW SUFFIX
20–LEAD SOIC PACKAGE
CASE 751D–04
DT SUFFIX
20–LEAD TSSOP PACKAGE
CASE 948E–02
M SUFFIX
20–LEAD SOIC EIAJ PACKAGE
CASE 967–01
ORDERING INFORMATION
MC74VHCXXXDW SOIC
MC74VHCXXXDT TSSOP
MC74VHCXXXM
SOIC EIAJ
PIN ASSIGNMENT
DIR 1
A1 2
A2 3
A3 4
A4 5
A5 6
A6 7
A7 8
A8 9
GND 10
20 VCC
19 OE
18 B1
17 B2
16 B3
15 B4
14 B5
13 B6
12 B7
11 B8
6/97
© Motorola, Inc. 1997
1
REV 1
Share Link: 