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MCP2515

Stand-Alone CAN Controller with SPI Interface

Microchip Technology 

MCP2515

2.4.1 ACTIVE ERRORS

If an error-active node detects a bus error, the node

interrupts transmission of the current message by

generating an active error flag. The active error flag is

composed of six consecutive dominant bits. This bit

sequence actively violates the bit-stuffing rule. All other

stations recognize the resulting bit-stuffing error and, in

turn, generate error frames themselves, called error

echo flags.

The error flag field, therefore, consists of between six

and twelve consecutive dominant bits (generated by

one or more nodes). The error delimiter field (eight

recessive bits) completes the error frame. Upon

completion of the error frame, bus activity returns to

normal and the interrupted node attempts to resend the

aborted message.

Note:

Error echo flags typically occur when a

localized disturbance causes one or more

(but not all) nodes to send an error flag.

The remaining nodes generate error flags

in response (echo) to the original error

flag.

2.4.2 PASSIVE ERRORS

If an error-passive node detects a bus error, the node

transmits an error-passive flag followed by the error

delimiter field. The error-passive flag consists of six

consecutive recessive bits. The error frame for an error-

passive node consists of 14 recessive bits. From this, it

follows that unless the bus error is detected by an error-

active node or the transmitting node, the message will

continue transmission because the error-passive flag

does not interfere with the bus.

If the transmitting node generates an error-passive flag,

it will cause other nodes to generate error frames due to

the resulting bit-stuffing violation. After transmission of

an error frame, an error-passive node must wait for six

consecutive recessive bits on the bus before attempting

to rejoin bus communications.

The error delimiter consists of eight recessive bits, and

allows the bus nodes to restart bus communications

cleanly after an error has occurred.

2.5 Overload Frame

An overload frame, shown in Figure 2-5, has the same

format as an active-error frame. An overload frame,

however, can only be generated during an interframe

space. In this way, an overload frame can be

differentiated from an error frame (an error frame is

sent during the transmission of a message). The

overload frame consists of two fields: an overload flag

followed by an overload delimiter. The overload flag

consists of six dominant bits followed by overload flags

generated by other nodes (and, as for an active error

flag, giving a maximum of twelve dominant bits). The

overload delimiter consists of eight recessive bits. An

overload frame can be generated by a node as a result

of two conditions:

1. The node detects a dominant bit during the

interframe space, an illegal condition.

Exception: The dominant bit is detected during

the third bit of IFS. In this case, the receivers will

interpret this as a SOF.

2. Due to internal conditions, the node is not yet

able to begin reception of the next message. A

node may generate a maximum of two

sequential overload frames to delay the start of

the next message.

Note:

Case 2 should never occur with the

MCP2515 due to very short internal

delays.

2.6 Interframe Space

The interframe space separates a preceding frame (of

any type) from a subsequent data or remote frame.

The interframe space is composed of at least three

recessive bits called the Intermission. This allows

nodes time for internal processing before the start of

the next message frame. After the intermission, the

bus line remains in the recessive state (bus idle) until

the next transmission starts.

DS21801G-page 8

 2003-2012 Microchip Technology Inc.

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