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MIC74(2000) Ver la hoja de datos (PDF) - Micrel

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MIC74 Datasheet PDF : 20 Pages
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MIC74
Micrel
Symbol
Parameter
/ALERT
VOL
Output Low Voltage
ILEAK
Leakage Current
AC Characteristics
tSTART
tPULSE
Fan Startup Interval
Minimum Pulse-Width
t/INT
Interrupt Delay
t/IR
tHD:STA
Delay from Status Read or ARA
Response to /ALERT VOH
Hold Time, Note 7
tSU:STA
tSU:STO
tHD:DAT
tSU:DAT
tTIMEOUT
tLOW
tHIGH
tF
tR
tBUF
Setup Time, Note 7
Stop Condition Setup Time
Data Hold Time
Data Setup Time
Clock Low Time-Out
Clock Low Period
Clock High Period
Clock/Data Fall Time
Clock/Data Rise Time
Bus free time between stop and
Start condition
Condition
Min Typ Max Units
IOL = 1mA
VIN = VDD or VSS
0.4
V
1 ±250 +1
µA
normal operation
minimum pulse-width on Pn to
generate an interrupt, Note 7
interrupt delay from state change
on Pn to /ALERT VOL, Note 7
0.5
1
3.3 sec
10
ns
4
µs
4
µs
hold time after repeated start condition.
4.0
µs
after this period, the first clock is generated.
repeated start condition setup time
4.7
µs
Note 7
4.0
µs
Note 7
500
ns
Note 7
0
ns
Notes 4, 7
25
35
ms
Notes 5, 7
4.7
µs
Notes 5, 7
4.0
50
µs
Notes 6, 7
300
ns
Notes 6, 7
1000
ns
Note 7
4.7
µs
Note 1.
Note 2.
Note 3.
Note 4.
Note 5.
Note 6.
Note 7.
Exceeding the absolute maximum rating may damage the device.
The device is not guaranteed to function outside its operating rating.
Devices are ESD sensitive. Handling precautions recommended. Human body model, 1.5k in series with 100pF.
Devices participating in a transfer will timeout when any clock low exceeds the value of tTIMEOUT(min) of 25ms. Devices that have detected a
timeout condition must reset the communication no later than tTIMEOUT(max) of 35ms. The maximum value specified must be adhered to by
both a master and a slave as it incorporates the cumulative stretch limit for both a master (10ms) and a slave (25ms).
tHIGH(max) provides a simple guaranteed method for devices to detect bus idle conditions.
Rise and fall time is defined as follows: tR = VIL(max) 0.15V to VIH(min) + 0.15V; tF = 0.9VDD to VIL(max) 0.15V.
Guaranteed by design.
Timing Definitions
CLK
tBUF
DATA
tR
tF
tLOW
tHD:STA
tHD:DAT
tSU:DAT
tHIGH
StoP Start
tSU:STA
tHD:STA
tSU:STO
Start
StoP
MIC74
4
August 1, 2000

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