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MK1705A

ATI Low EMI Clock Generator

Integrated Circuit Systems 

ICROCLOCK

Pin Assignment

MK1705A

ATI Low EMI Clock Generator

ICLK 1

VDD 2

GND 3

CLK 4

8 PD

7 S0

6 S1

5 LEE

8 pin SOIC

Clock Output Select Table

S1 S0 Input/Output Range

pin 6 pin 7

pin 1/pin 4

00

40 to 167 MHz

01

60 to 167 MHz

10

Test

11

40 to 100 MHz

Frequency spread

vs. CLK

Center ±1.25%

Center ±0.5%

Test

Center ±1%

Pin Descriptions

Pin #

1

2

3

4

5

6

7

8

Name

ICLK

VDD

GND

CLK

LEE

S1

S0

PD

Type Description

I Connect to graphics input clock

P Connect to +3.3V or +5V.

P Connect to ground.

O Spread spectrum Clock Output per table above.

I Low EMI Enable. Turns on the spread spectrum when high. Internal pull-up.

I Frequency Select 1 Input. Selects spread amount and CLK range per table above. Internal pull-up.

I Frequency Select 0 Input. Selects spread amount and CLK range per table above. Internal pull-up.

I Power Down. Stops output low when this pin is low. Internal pull-up.

Key: I = Input, O = output, P = power supply connection

External Components

A minimum number of external components are required for proper operation. A decoupling capacitor of

0.01µF should be connected between VDD and GND on pins 2 and 3 as close to the chip as possible, and

a 33Ω series terminating resistor may be used on the clock output if the trace is longer than 1 inch.

MDS 1705A B

2

Revision 8090

Printed 8/9/00

Integrated Circuit Systems, Inc. •525 Race Street•San Jose•CA • 95126 • (408)295-9800tel • www.icst.com

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