ML4901 Ver la hoja de datos (PDF) - Micro Linear Corporation
Número de pieza
componentes Descripción
Lista de partido
ML4901 Datasheet PDF : 8 Pages
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ML4901
12VIN
5VIN
C11
22µF
25V
C10
220nF
16V
OUTEN
UP#
C13
D1
BAW56
ML4901
1µF
16V
VID0
1 D0
PROTECT 16
VID1
VID2
2 D1
3 D2
VDD 15
P DRV 14
VID3
4 D3
N DRV 13
5 SHDN
PWR GND 12
PWRGD
6 PWR GOOD
COMP 11
C14
7 VREF
1nF
C8 8 GND
220nF
16V
ISENSE 10
VFB 9
R3
330kΩ
C9
33pF
R4
1kΩ
R5
100kΩ
C12
220nF
16V
Q1
Q2
R1
6mΩ
1W
3X C1 C2 C3
1800µF
10V
L2
2.5.µH
4X C4 C5 C6 C7
1800µF
10V
VCCP
VSS
Figure 1. Pentium Pro VRM Circuit
Because of this, there must be a good electrical
connection between the ML4901 PWR GND and GND
pins. At the same time, PWR GND must have a low
impedance connection to the ground plane used on the
board, as high instantaneous currents will flow in PWR
GND when N DRV L and N DRV H switch the capacitive
loads of the output MOSFET gates. A layout technique
which satisfies these requirements is to return PWR GND
to the grounded end of R1 using a high current Kelvin
connection. Figure 2 shows one successful
implementation of these PCB layout requirements.
ISENSE is an input to a medium-speed, high-sensitivity
comparator. It is often helpful to shield the trace running
from R1 to ISENSE with a “guard trace” to circuit ground.
The compensation components R3 and C9 are high-
impedance nodes connected to the output of the voltage
loop error amplifier. These components should be kept in
close proximity to the ML4901. C9 should be returned to
GND, not to PWR GND or the ground plane of the PC
board. It may be helpful to shield the trace running from
R3 to COMP with a “guard trace” to circuit ground.
Keep the VREF bypass capacitor C8 close to the ML4901.
Ensure that its ground connection is to GND, not PWR
GND or the ground plane of the PCB.
The VDD bypass capacitors C10 and C11 should be
returned to PWR GND or to the PC board ground plane.
They should not be returned to GND due to high transient
currents which could interfere with the current sensing
function.
If a given design uses power MOSFETs in an SO-8
package style, keep in mind that their thermal dissipation
capability is largely dictated by the copper area available
to their drains. A good layout will maximize this area.
TO
ISENSE
TO
PWR GND
TO
GND
TO
SYNCHRONOUS
RECTIFIER
MOSFET
SOURCE
SENSE
RESISTOR
POWER GROUND RETURN
(GROUND PLANE)
Figure 2. Kelvin Sense Connections
7
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