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MP1530

Triple Output Step-Up Plus Linear Regulators for TFT Bias

Monolithic Power Systems 

MP1530 – TRIPLE OUTPUT STEP-UP PLUS LINEAR REGULATORS FOR TFT BIAS

PIN FUNCTIONS

QFN

Pin #

TSSOP

Pin #

Name

1

15

SW

2

16

CT

3

1

RDY

Description

Step-Up Converter Power Switch Node. Connect an inductor between the input source

and SW, and connect a rectifier from SW to the main output to complete the step-up

converter. SW is the drain of the internal 250mΩ N-Channel MOSFET switch.

Timing Capacitor for Power Supply Soft-Start and Power-On Sequencing. A capacitor

from CT to GND controls the soft-start and sequencing turn-on delay periods. See

Power-On Sequencing and Start Up Timing Diagram.

Regulators Not Ready. During startup RDY will be left high. Once the turn-on sequence

is complete, this pin will be pulled low if all FB voltages exceed 80% of their specified

thresholds. After all regulators are turned-on, a fault in any regulator that causes the

respective FB voltage to fall below 80% of its threshold will cause RDY to go high after

approximately 15µs. If the fault persists for more than approximately 6ms (for CCT=10nF),

the entire chip will shut down. See Fault Sensing and Timer.

4

2

FB1 Step-Up Converter Feedback Input. FB1 is the inverting input of the internal error

amplifier. Connect a resistive voltage divider from the output of the step-up converter to

FB1 to set the step-up converter output voltage.

5

3 COMP Step-Up Converter Compensation Node. COMP is the output of the error amplifier.

Connect a series RC network to compensate the regulation control loop of the step-up

converter.

6

4

IN Internal Power Input. IN supplies the power to the MP1530. Bypass IN to PGND with a

10µF or greater capacitor.

7

5

GND Signal Ground.

8

6

REF Reference Output. REF is the 1.25V reference voltage output. Bypass REF to GND with

a 0.1µF or greater capacitor. Connect REF to the low-side resistor of the negative linear

regulator feedback string.

9

7

FB2 Negative Linear Regulator Feedback Input. Connect the FB2 feedback resistor string

between GL and REF to set the negative linear regulator output voltage. FB2 regulation

threshold is GND.

10

8

FB3 Positive Linear Regulator Feedback Input. Connect the FB3 feedback resistor string

between GH and GND to set the positive linear regulator output voltage. FB3 regulation

threshold is 1.25V.

11

9

EN On/Off Control Input. Drive EN high to turn on the MP1530, drive EN low to turn it off. For

automatic startup, connect EN to IN. Once the MP1530 is turned on, it sequences the

outputs on (See Power-On Sequencing). When turned off, all outputs are immediately

disabled.

12

10

GL Negative Linear Regulator Output. GL is the output of the negative linear regulator. GL

can supply up to 20mA to the load. Bypass GL to GND with a 1µF or greater, low-ESR,

ceramic capacitor.

13

11

IN2 Negative Linear Regulator Input. IN2 is the input of the negative linear regulator. Drive

IN2 with an inverting charge pump powered from SW. IN2 can go as low as -20V. For

QFN package IN2 connects to exposed pad.

14

12

GH Positive Linear Regulator Output. GH is the output of the positive linear regulator. GH

can supply as much as 20mA to the load. Bypass GH to GND with a 1µF or greater, low-

ESR, ceramic capacitor.

15

13

IN3 Positive Linear Regulator Input. IN3 is the input to the positive linear regulator. Drive IN3

with a doubling, tripling, or quadrupling charge pump from SW. IN3 voltage can go as

high as 38V.

16

14 PGND Power Ground. PGND is the source of the internal 250mΩ N-Channel MOSFET switch.

Connect PGND to GND as close to the MP1530 as possible.

MP1530 Rev. 1.4

www.MonolithicPower.com

6

5/19/2006

MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.

© 2006 MPS. All Rights Reserved.

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