MPC5644B Ver la hoja de datos (PDF) - Freescale Semiconductor

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fabricante

MPC5644B

Microcontroller

Freescale Semiconductor 

Table 2. MPC5646C series block summary (continued)

Block

Function

LinFlexD (Local Interconnect

Network Flexible with DMA

support)

Manages a high number of LIN (Local Interconnect Network protocol) messages

efficiently with a minimum of CPU load

Memory protection unit (MPU)

Provides hardware access control for all memory references generated in a

device

Clock generation module

(MC_CGM)

Provides logic and control required for the generation of system and peripheral

clocks

Power control unit (MC_PCU)

Reduces the overall power consumption by disconnecting parts of the device

from the power supply via a power switching device; device components are

grouped into sections called “power domains” which are controlled by the PCU

Reset generation module

(MC_RGM)

Centralizes reset sources and manages the device reset sequence of the device

Mode entry module (MC_ME)

Provides a mechanism for controlling the device operational mode and

modetransition sequences in all functional states; also manages the power

control unit, reset generation module and clock generation module, and holds the

configuration, control and status registers accessible for applications

Non-Maskable Interrupt (NMI)

Handles external events that must produce an immediate response, such as

power down detection

Nexus Development Interface

(NDI)

Provides real-time development capabilities for e200z0h and e200z4d core

processor

Periodic interrupt timer/ Real Time Produces periodic interrupts and triggers

Interrupt Timer (PIT_RTI)

Real-time counter (RTC/API)

A free running counter used for time keeping applications, the RTC can be

configured to generate an interrupt at a predefined interval independent of the

mode of operation (run mode or low-power mode). Supports autonomous

periodic interrupt (API) function to generate a periodic wakeup request to exit a

low power mode or an interrupt request

Static random-access memory

(SRAM)

Provides storage for program code, constants, and variables

System integration unit lite (SIUL) Provides control over all the electrical pad controls and up 32 ports with 16 bits

of bidirectional, general-purpose input and output signals and supports up to 32

external interrupts with trigger event configuration

System status and configuration

module (SSCM)

Provides system configuration and status data (such as memory size and status,

device mode and security status), device identification data, debug status port

enable and selection, and bus and peripheral abort enable/disable

System timer module (STM)

Provides a set of output compare events to support AutoSAR and operating

system tasks

Semaphores

Provides the hardware support needed in multi-core systems for sharing

resources and provides a simple mechanism to achieve lock/unlock operations

via a single write access.

Wake Unit (WKPU)

Supports external sources that can generate interrupts or wakeup events, of

which can cause non-maskable interrupt requests or wakeup events.

MPC5646C Microcontroller Data Sheet, Rev. 3

8

Preliminary—Subject to Change Without Notice

Freescale Semiconductor

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