MSM5416258B Ver la hoja de datos (PDF) - Oki Electric Industry

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MSM5416258B

262,144-Word x 16-Bit DYNAMIC RAM : FAST PAGE MODE TYPE WITH EDO

Oki Electric Industry 

Notes:

1. All voltages are referenced to Vss.

2. This parameter is dependent upon the cycle rate.

3. This parameter is dependent upon the output loading. Specified values are obtained

with the output open.

4. An initial pause of 200µs is required after power-up, followed by any 8RAS cycles.

(Example: RAS-only-refresh) before proper device operation is achieved. In case of

using internal refresh counter, a minimum of 8CAS before RAS cycles instead of 8RAS

cycles are required.

5. The AC characteristics assume tT=5ns.

6. VIH (Min.)and VIL (Max.) are reference levels for measuring timing of input signals.

Also, transition times are measured between V IH and VIL.

7. Data outputs are measured with a load of 30 pF.

DOUT reference levels: V OH/VOL=1.8V/1.4V.

8. tREZ (Max.), tOFF (Max.), tWEZ (Max.) and tOEZ (Max.) define the time at which the outputs

achieve the open circuit condition and are not referebced to output voltage levels.

This parameter is sampled and not 100 % tested.

9. Either tRCH or tRRH must be satisfied for a read cycle.

10. These parameters are referenced to CAS leadind edge of early write cycles and to WE

leading edge in OE-controlled write cycles and read-modify-write cycles.

11. tWCS, tRWD, tCWD and tAWD are not restrictive operating parameters. They are included in the

data sheet as electrical characteristics only. If t t≥ WCS WCS (Min.), the cycle is an early write

cycle and the data out pins will remain open circuit throughout the entire cycle.

If t t≥ RWD RWD (Min.), t t≥ CWD CWD (Min.) and t t≥ AWD AWD (Min.), the cycle is a read-modify-

write cycle and the data out will contain data read from the selected cell. If neither or the

above sets of conditions is satisfied, the condition of the data out is indetermunate.

12. Operation within the tRCD (Max.) limit insures that tRAC (Max.) can be met.

tRCD (Max.) is specified as a reference point only. If tRCD is greater than the specified

tRCD (Max.) limit, then access time is controlled by tCDC.

13. Operation within the tRAD (Max.) limit ensures that tRAC (Max.) can be met. tRAD (Max.) is

specified as a reference point only: If tRAD is greater than the specified tRAD (Max.) limit,

then access time is controlled by tAA.

14. Input levels at the AC testing are 3.0V/0V.

15. Addresses (A0 - A8) may be changed two times or less while RAS =V IL.

16. Addresses (A0 - A8) may be changed once or less while CAS =V IH and RAS =VIL.

17. This is guaranteed by design. ( t t= COH CAC - output transition time). This parameter is not

100 % tested.

18. This parameter is dependent upon the number of address transitions. Specified values

are measured with a maximum of two transitions per address cycle in Fast Page Mode.

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