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MT8985(1995) Ver la hoja de datos (PDF) - Mitel Networks

Número de pieza
componentes Descripción
fabricante
MT8985
(Rev.:1995)
Mitel
Mitel Networks Mitel
MT8985 Datasheet PDF : 18 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
CMOS ST-BUSFAMILY MT8985
®
Enhanced Digital Switch
Features
• 256 x 256 channel non-blocking switch
• Programmable frame integrity for wideband
channels
• Automatic identification of ST-BUS/GCI
interface backplanes
• Per channel tristate control
• Patented message mode
• Non-multiplexed microprocessor interface
• Single +5 volt supply
• Available in DIP-40, PLCC-44 and QFP-44
packages
• Pin compatible with MT8980 device
Applications
• Medium size digital switch matrices
• Hyperchannel switching (e.g., ISDN H0)
• ST-BUS/MVIPinterface functions
• Serial bus control and monitoring
• Centralized voice processing systems
• Data multiplexer
ISSUE 4
May 1995
Ordering Information
MT8985AC 40 Pin Ceramic DIP
MT8985AE 40 Pin Plastic DIP
MT8985AP 44 Pin PLCC
MT8985AL 44 Pin QFP
-40°C to +85°C
Description
The MT8985 Enhanced Digital Switch device is an
upgraded version of the popular MT8980D Digital
Switch (DX). It is pin compatible with the MT8980D
and retains all of the MT8980D's functionality. This
VLSI device is designed for switching PCM-encoded
voice or data, under microprocessor control, in digital
exchanges, PBXs and any ST-BUS/MVIP
environment. It provides simultaneous connections
for up to 256 64kb/s channels. Each of the eight
serial inputs and outputs consist of 32 64 kbit/s
channels multiplexed to form a 2048 kbit/s stream.
As the main function in switching applications, the
device provides per-channel selection between
variable or constant throughput delays. The constant
throughput delay feature allows grouped channels
such as ISDN H0 to be switched through the device
maintaining its sequence integrity. The MT8985 is
ideal for medium sized mixed voice/data switch and
voice processing applications.
STi0
STi1
STi2
STi3
STi4
STi5
STi6
STi7
Serial
to
Parallel
Converter
C4i F0i
VDD VSS
Data
Memory
Frame
Counter
Control Register
Control Interface
AAAAAA
AAAAAA
DS CS R/W A5/ DTA D7/
A0
D0
Output
MUX
Connection
Memory
CSTo
Figure 1 - Functional Block Diagram
ODE
Parallel
to
Serial
Converter
STo0
STo1
STo2
STo3
STo4
STo5
STo6
STo7
2-45

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