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MX23L1654 Ver la hoja de datos (PDF) - Macronix International

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MX23L1654 Datasheet PDF : 18 Pages
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MX23L1654
SPI MODES
These devices can be driven by a microcontroller with its
SPI peripheral running in either of the two following modes:
- CPOL=0, CPHA=0
- CPOL=1, CPHA=1
For these two modes, input data is latched in on the rising
edge of Serial Clock (C), and output data is available from
the falling edge of Serial Clock (C).
The difference between the two modes, as shown in Figure
2, is the clock polarity when the bus master is in Stand-by
mode and not transferring data:
- C remains at 0 for (CPOL=0, CPHA=0)
- C remains at 1 for (CPOL=1, CPHA=1)
Figure 1. Bus Master and Memory Devices on the SPI Bus
SPI Interface with
(CPOL, CPHA) =
(0, 0) or (1, 1)
Bus Master
(ST6, ST7, ST9,
ST10, Others)
SDO
SDI
SCK
CS3 CS2 CS1
CQD
CQD
CQD
SPI Memory
Device
SPI Memory
Device
SPI Memory
Device
S#
HOLD# S#
HOLD# S#
HOLD#
Note: 1. Hold (HOLD#) signals should be driven, High or Low as appropriate.
Figure 2. SPI Modes Supported
CPOL CPHA
0
0
C
1
1
C
D
Q
MSB
MSB
P/N: PM1174
4
REV. 1.2, JUN. 08, 2005

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