MX93002
The Timing Description of CODEC Function
TIMING
DESCRIPTION
tA, ta VDD / AVDD ¡ Ü3.0VDC
tC MCLK started
tC ⇒ tG MCLK keeps
tc ⇒ tg
tG, tg Power-down started ( MCLK keeps High or Low )
tJ, tl Power-down ended ( MCLK started )
tF ⇒ t I MCLK keeps High or Low
tA ⇒ tB the charge time of VBG ( where VBG bypass cap. = 0.1uF )
ta ⇒ tb
tC ⇒ tD the charge time of internal clock detector circuit
tJ ⇒ tK
tc ⇒ td
tk ⇒ tl
tD ⇒ tE the lock-in time of PLL ( C1=100pF, C2=6pF, R1=68KΩ )
tK ⇒ tL
td ⇒ te
tl ⇒ tm
tD ⇒ tF the charge time of VAG ( where VAG bypass cap. = 0.1uF )
tK ⇒ tM
td ⇒ tf
tG ⇒ tH the discharge time of internal clock detector circuit
tg ⇒ th
tH ⇒ tI the discharge time of VAG ( where VAG bypass cap. = 0.1uF )
th ⇒ tj
th ⇒ ti the delay time of VBG disable ( where VBG bypass cap. = 0.1uF )
tl ⇒ tn the re-charge time of VBG ( where VBG bypass cap. = 0.1uF )
the re-charge time of VAG ( where VAG bypass cap. = 0.1uF )
@ when change VBG bypass capacitor (C15) :
i. from 0.1uF to 1uF : (tA ⇒ tB)’ ¡ Ü10 ∗ (tA ⇒ tB)
ii. from 0.1uF to 0.01uF : (tA ⇒ tB)’ ¡ Ü1/10 ∗ (tA ⇒ tB)
MIN TYP MAX UNIT
140 190 290 ms
20 us
50
110 160 us
1.5
2
2.5 ms
50 us
0.3
0.5
0.7 ms
6
10
15 ms
400 500 700 ms
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