74F269 Ver la hoja de datos (PDF) - NXP Semiconductors.
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74F269 Datasheet PDF : 19 Pages
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NXP Semiconductors
74F269
8-bit bidirectional binary counter
VI
CET
GND
VOH
TC
VOL
VM
tPHL
VM
tPLH
VI
001aaa652
Fig 8.
Measurement points are given in Table 8.
VM = 1.5 V
VOL and VOH are the typical output voltage levels that occur with the output load.
Input (CET) to output (TC) propagation delay
VI
U/D
GND
VOH
TC
VOL
VM
tPHL
VM
tPLH
VI
001aaa653
Fig 9.
Measurement points are given in Table 8.
VM = 1.5 V
VOL and VOH are the typical output voltage levels that occur with the output load.
The up/down control input (U/D) to output (TC) propagation delay
VI
Dn
GND
VI
PE
GND
VI
CP
GND
VM
tsu
VM
VM
tsu(L)
VM
VM
th
VM
VM
tsu(H)
th = 0 ns
th = 0 ns
VM
001aal301
The shaded areas indicate when the input is permitted to change for predictable output performance.
Measurement points are given in Table 8.
VM = 1.5 V
Fig 10. Data input (Dn), parallel enable input (PE) and clock input (CP) set-up and hold times
74F269_5
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 05 — 25 March 2010
© NXP B.V. 2010. All rights reserved.
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