HI20201 Ver la hoja de datos (PDF) - Intersil

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HI20201

10-Bit, 160 MSPS, Ultra High Speed D/A Converter

Intersil 

HI20201

Electrical Specifications TA = 25oC, AVEE = DVEE = -5.2V, AGND = DGND = 0V, RL = ∞, VOUT = -1V (Continued)

HI20201JCB/JCP

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

POWER SUPPLY CHARACTERISITICS

IEE

Power Dissipation

75Ω load

-60

-75

-90

-

420

470

NOTES:

2. Parameter guaranteed by design or characterization and not production tested.

3. Excludes error due to reference drift.

4. Electrical specifications guaranteed only under the stated operating conditions.

UNITS

mA

mW

Timing Diagram

CLK

CLK

DATA

tSU

N

tHD

N+1

0V

D/A OUT

-1V

tD

90%

N

50%

10%

tr

tD

N+1

tf

FIGURE 1. LADDER SETTLING TIME FULL POWER BANDWIDTH (LS)

Pin Descriptions

28 PIN SOIC

PIN NAME

PIN DESCRIPTION

1-10

D0 (LSB)-D9 (MSB) Digital Data Bit 0, the Least Significant Bit thru Digital Data Bit 9, the Most Significant Bit.

11, 12, 19, 21- 25

NC

No Connect, not used.

13

CLK

Negative Differential Clock Input.

14

CLK

Positive Differential Clock Input

15

DVEE

Digital (ECL) Power Supply -4.75V to -7V.

16

COMPL

Data Complement Pin. When set to a (ECL) logic High the input data is complemented in the

input buffer. When cleared to a (ECL) logic Low the input data is not complemented.

17

DVSS

Digital Ground.

18

AVSS

Analog Ground.

20

IOUT

Current Output Pin.

26

AVEE

Analog Supply -4.75V to -7V.

27

VREF

Input Reference Voltage used to set the output full scale range.

28

AVSS

Analog Ground.

10-1200

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