HI5710A Ver la hoja de datos (PDF) - Intersil

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HI5710A

10-Bit, 20 MSPS A/D Converter

Intersil 

HI5710A

Pin Description and I/O Pin Equivalent Circuit (Continued)

PIN

NUMBER

SYMBOL

EQUIVALENT CIRCUIT

DESCRIPTION

29, 30

VRT

34, 35

VRB

AVDD

Reference Top, normally 4.0V.

Reference Bottom, normally 2.0V.

29, 30

AVSS

34, 35

38

AT

42

TS

37

TSTR

23

OE

24

CE

19

TESTMODE

20

LINV

AVDD

23

AVSS

AVDD

24

AVSS

AVDD

19

AVSS

AVDD

20

AVSS

Factory Test Signal Output, leave pin open.

Factory Test Signal Input, tie to AVDD.

Factory Test Signal Input, tie to AVSS.

D0 to D9 Output Enable.

Low: Outputs Enabled.

High: High Impedance State.

Chip Enable.

Low: Active State.

High: Standby State.

Test Mode.

High: Normal Output State.

Low: Output fixed.

Output Inversion.

High: D0 to D8 are inverted.

Low: D0 to D8 are normal.

4-1540

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