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P4C189

HIGH SPEED 16 x 4 STATIC CMOS RAM WITH INVERTING OUTPUTS

Semiconductor Corporation 

TIMING WAVEFORM OF WRITE CYCLE NO. 2 (CS CONTROLLED)(9)

P4C189

Notes:

9. CS and WE must be LOW for WRITE cycle.

10. If CS goes HIGH simultaneously with WE high, the output remains

in a high impedance state.

11. Write Cycle Time is measured from the last valid address to the first

transition address.

Document # SRAM100 Rev OR

Page 5 of 8

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