75542S Ver la hoja de datos (PDF) - Fairchild Semiconductor
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75542S Datasheet PDF : 9 Pages
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HUF75542P3, HUF75542S3S
PSPICE Electrical Model
.SUBCKT HUF75542P3 2 1 3 ; rev 15 Feb 2000
CA 12 8 4.4e-9
CB 15 14 4.2e-9
CIN 6 8 2.5e-9
DBODY 7 5 DBODYMOD
DBREAK 5 11 DBREAKMOD
DPLCAP 10 5 DPLCAPMOD
EBREAK 11 7 17 18 87.2
EDS 14 8 5 8 1
EGS 13 8 6 8 1
ESG 6 10 6 8 1
EVTHRES 6 21 19 8 1
EVTEMP 20 6 18 22 1
IT 8 17 1
LDRAIN 2 5 1.0e-9
LGATE 1 9 2.6e-9
LSOURCE 3 7 1.1e-9
GATE
1
MMED 16 6 8 8 MMEDMOD
MSTRO 16 6 8 8 MSTROMOD
MWEAK 16 21 8 8 MWEAKMOD
RBREAK 17 18 RBREAKMOD 1
RDRAIN 50 16 RDRAINMOD 5.5e-3
RGATE 9 20 1.0
RLDRAIN 2 5 10
RLGATE 1 9 26
RLSOURCE 3 7 11
RSLC1 5 51 RSLCMOD 1e-6
RSLC2 5 50 1e3
RSOURCE 8 7 RSOURCEMOD 3.3e-3
RVTHRES 22 8 RVTHRESMOD 1
RVTEMP 18 19 RVTEMPMOD 1
S1A 6 12 13 8 S1AMOD
S1B 13 12 13 8 S1BMOD
S2A 6 15 14 13 S2AMOD
S2B 13 15 14 13 S2BMOD
DPLCAP 5
10
RSLC2
RSLC1
51
5
51
ESLC
DBREAK
11
LDRAIN
DRAIN
2
RLDRAIN
LGATE
RLGATE
-
ESG
6
8
+
EVTEMP
RGATE + 18 - 6
9
20 22
EVTHRES
+ 19 -
8
CIN
S1A
12 13
8
S2A
14
15
13
50
RDRAIN
16
21
+
17
EBREAK 18
-
MWEAK
DBODY
MMED
MSTRO
8
7
RSOURCE
LSOURCE
SOURCE
3
RLSOURCE
RBREAK
17
18
S1B
S2B
CA
13
CB
+
+ 14
EGS
6
8
-
EDS
5
8
-
RVTEMP
19
IT
-
VBAT
+
8
22
RVTHRES
VBAT 22 19 DC 1
ESLC 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1e-6*230),2.5))}
.MODEL DBODYMOD D (IS = 2.5e-12 RS = 2.85e-3 XTI = 5.5 TRS1 = 2e-3 TRS2 = 1e-6 CJO = 3.2e-9 TT = 5.5e-8 M = 0.6)
.MODEL DBREAKMOD D (RS = 2.9e- 1TRS1 = 1e- 3TRS2 = 1e-6)
.MODEL DPLCAPMOD D (CJO = 3.4e- 9IS = 1e-3 0M = 0.8 N = 10)
.MODEL MMEDMOD NMOS (VTO = 3.06 KP = 4.8 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 1)
.MODEL MSTROMOD NMOS (VTO = 3.5 KP = 80 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u)
.MODEL MWEAKMOD NMOS (VTO = 2.67 KP = 0.08 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 10)
.MODEL RBREAKMOD RES (TC1 =1.3e- 3TC2 = -9e-7)
.MODEL RDRAINMOD RES (TC1 = 1.1e-2 TC2 = 2.5e-5)
.MODEL RSLCMOD RES (TC1 = 4.5e-3 TC2 = 1e-5)
.MODEL RSOURCEMOD RES (TC1 = 0 TC2 = 0)
.MODEL RVTHRESMOD RES (TC1 = -2.5e-3 TC2 = -1.1e-5)
.MODEL RVTEMPMOD RES (TC1 = -2.75e- 3TC2 = 0)
.MODEL S1AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -6.0 VOFF= -4.5)
.MODEL S1BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -4.5 VOFF= -6.0)
.MODEL S2AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -0.5 VOFF= 0.5)
.MODEL S2BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 0.5 VOFF= -0.5)
.ENDS
NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global
Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank Wheatley.
©2001 Fairchild Semiconductor Corporation
HUF75542P3, HUF75542S3S Rev. B
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