PCD5008 Ver la hoja de datos (PDF) - Philips Electronics
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PCD5008 Datasheet PDF : 64 Pages
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Philips Semiconductors
FLEX™ Pager Decoder
Product specification
PCD5008
8.5 Receiver control interface
8.5.1 GENERAL
The PCD5008 has 8 programmable receiver control lines,
S0 to S7. The host can program via SPI packets what
setting is applied to the receiver control lines, the duration
of warm-up and shut-down stages and the polling of the
LOBAT pin. This programmability allows the PCD5008 to
interface with many off-the-shelf receiver ICs. Note that
these packets are ignored when sent while decoding is
enabled (ON bit is set in the control packet).
8.5.2 LOW BATTERY DETECTION
The PCD5008 can be configured to poll the LOBAT pin at
the end of every receiver control setting. This check can be
enabled or disabled for each receiver control setting. If the
poll is enabled for a setting, the pin is read just before the
PCD5008 activates the next setting on the receiver control
lines. The PCD5008 sends a status packet whenever the
value differs from the previous time that the LOBAT pin
was polled.
8.5.3 RECEIVER SETTINGS AT RESET
The receiver control ports are 3-state outputs which are set
to high impedance when the PCD5008 is reset, until the
corresponding FRS bit in the receiver line control packet is
set or the PCD5008 is turned on for the first time after a
reset (by setting the ON bit in the control packet). This
allows the designer to force the receiver control lines to the
receiver off setting with external pull-up or pull-down
resistors before the host can configure these settings in
the PCD5008.
8.5.4 RECEIVER OFF STATE (ID = 10H)
The receiver off state is configured by the receiver off
setting packet (Table 13), which defines the settings to be
applied when the PCD5008 decides to switch the
receiver off.
LBC: low battery check (Table 13). If this bit is set, the
PCD5008 checks the status of the LOBAT port just before
leaving the receiver off state. Value after reset = 0.
CLS: control line setting (Table 13). This is the value to be
output on the receiver control lines for the receiver off
state. Value after reset = 0.
ST: step time (Table 13). This sets the duration of the
warm-up off time. The setting is in steps of 625 µs. Valid
values are 625 µs (ST = 01H) to 159.375 ms (ST = FFH).
Value after reset = 01H.
Table 12 Status packet bit assignments
BYTE
3
2
1
0
BIT 7
0
FIV
SM
SMU
BIT 6
1
f6
LB
LBU
BIT 5
1
f5
x
x
BIT 4
1
f4
x
MT
Table 13 Receiver off setting packet bit assignments
BYTE
3
2
1
0
BIT 7
0
0
CLS7
ST7
BIT 6
0
0
CLS6
ST6
BIT 5
0
0
CLS5
ST5
BIT 4
1
0
CLS4
ST4
BIT 3
1
f3
c3
x
BIT 3
0
LBC
CLS3
ST3
BIT 2
1
f2
c2
EOF
BIT 2
0
0
CLS2
ST2
BIT 1
1
f1
c1
x
BIT 1
0
0
CLS1
ST1
BIT 0
1
f0
c0
BOE
BIT 0
0
0
CLS0
ST0
1998 Jun 17
21
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