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PCD6003

Digital telephone answering machine chip

Philips Electronics 

Philips Semiconductors

Digital telephone answering machine chip

Product specification

PCD6003

NAME ADDRESS (HEX)

DESCRIPTION

RESET STATE(1)

PMTR2

PSW

RTCON

S1CON

S1ADR

S1DAT

S1STA

SYMOD

SPCON

SP

TCON

TMOD

TL0

TL1

TH0

TH1

VREFR

WDT

WDTKEY

XWUD

B6

Power Management Test Register 2; see note 2

D0

Program Status Word

9B

Real-Time Clock control

D8

I2C-bus Serial Control Register

DB

I2C-bus own slave address register

DA

I2C-bus Data Shift Register

D9

I2C-bus Status Register (read only)

C5

analog system mode control

99

system power and clock configuration

81

Stack Pointer

88

Timer/counter Control Register

89

Timer/counter Mode Control Register

90

Timer Low Register 0

91

Timer Low Register 1

92

Timer High Register 0

93

Timer High Register 1

BA

Voltage Reference Register

FF

Watchdog Timer

F7

Watchdog Key Register

B9

external wake-up disable

0000 0000

0000 0000

0000 0000

0000 0000

0000 0000

0000 0000

1111 1000

0000 0000

0XX0 0000

0000 0111

0000 0000

0000 0000

0000 0000

0000 0000

0000 0000

0000 0000

1010 0000

0000 0000

0000 0000

0000 0000

Notes

1. All SFR bits with reset state ‘X’ are either ‘spare’ (i.e. have a memory bit in this position with reset state ‘0’) or ‘-’ (i.e.

do not have a physical memory bit in this position). All ‘spare’ bits can be addressed and used as additional general

purpose bits. All bits marked ‘-’ cannot be addressed by the user. To see which bits are ‘spare’ or ‘-’ refer to the

respective SFR layouts.

2. Reserved registers, used for testing purposes. Writing of undocumented or reserved bits might lead to unexpected

behaviour of the device (see Section 10.8).

2001 Apr 17

25

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