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PCK2023DGG

CK408 (66/100/133/200 MHz) spread spectrum differential system clock generator

Philips Electronics 

Philips Semiconductors

CK408 (66/100/133/200 MHz) spread

spectrum differential system clock generator

Product data

PCK2023

CPU 1.0 V AC TIMING REQUIREMENTS

SYMBOL PARAMETER

TPERIOD

tABSMIN

average period

absolute

minimum host

clock period

Diff-tRISE

Diff-tFALL

SE ∆SKEW

rise time

fall time

Absolute

single-ended

rise/fall

waveform

symmetry

VCROSS

absolute

crossing point

voltages

tCCJITTER

cycle-to-cycle

jitter

Duty Cycle

—

SE-VOH

maximum

voltage

allowed at

output

SE-VOL

minimum

voltage

allowed at

output

Diff-

VRING_RISE

Diff-

VRING_FALL

rising edge

ringback

falling edge

ringback

CPU 200 MHz

MIN

MAX

5.0

5.1

4.85

—

175

467

175

467

—

325

0.51

0.76

—

150

45

55

.92

1.45

–200

350

0.35

—

—

–0.35

CPU 133 MHz

MIN

MAX

7.5

7.65

7.35

—

175

467

175

467

—

325

0.51

76

—

150

45

55

.92

1.45

–200

350

0.35

—

—

–0.35

CPU 100 MHz

MIN

MAX

10.0

10.2

9.85

—

300

467

175

467

—

325

0.51

76

—

150

45

55

.92

1.45

–200

350

0.35

—

—

–0.35

CPU 66 MHz

MIN

MAX

15.0

15.3

UNITS NOTES

ns

1, 15

14.85

—

ns

1, 15

300

467

ps 15, 16

175

467

ps 15, 16

—

325

ps 17, 18

—

—

V

18

—

150

ps 15, 19

45

55

%

15

.92

1.45

V

18

–200

350

mV

18

0.35

—

V

15

—

–0.35

V

15

2001 Sep 07

11

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