PE4256
Product Specification
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS™
devices are immune to latch-up.
Switching Frequency
The PE4256 has a maximum 25 kHz switching
rate when the internal negative voltage generator
is used (pin 18 = GND).
Table 5. RF Path Truth Table
C1
C2
RFC – RF1
Low
Low
High
High
Low
High
Low
High
OFF
OFF
ON
N/A1
RFC – RF2
OFF
ON
OFF
N/A1
Table 6. Termination Truth Table
C1
C2
RFC – 75 Ω RF1 – 75 Ω RF2 – 75 Ω
Low
Low
High
High
Low
High
Low
High
X2
N/A1
X2
X2
N/A1
X2
X2
N/A1
Notes: 1. The operation of the PE4256 is not supported or characterized in the
C1 = VDD and C2 = VDD state.
2. "X" denotes termination enabled.
Document No. 70-0144-04 │ www.psemi.com
©2010-2011 Peregrine Semiconductor Corp. All rights reserved.
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