4273-51(2012) Ver la hoja de datos (PDF) - Peregrine Semiconductor Corp.

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4273-51
(Rev.:2012)

SPDT Broadband UltraCMOS® 5 – 3000 MHz RF Switch

Peregrine Semiconductor Corp. 

PE4273

Product Specification

Figure 3. Pin Configuration (Top View)

pin 1

RF1 1

GND 2

RF2 3

6 V2

5 RFC

4 V1

Table 2. Pin Descriptions

Pin No. Pin Name

Description

1

RF1

RF Port1 1

Ground connection. Traces should be

2

GND

physically short and connected to ground

plane for best performance.

3

RF2

RF Port2 1

4

V1

Switch control input, CMOS logic level.

5

RFC

RF Common 1

This pin supports two interface options:

Single-pin control mode. A nominal 3-volt

6

V2

supply connection is required.

Complementary-pin control mode. A com-

plementary CMOS control signal to V1

is supplied to this pin.

Note: 1. All RF pins must be DC blocked with an external series

capacitor or held at 0 VDC

Table 3. DC Electrical Specifications

Parameter

Min

Typ Max

VDD Power Supply

Voltage

2.7

3.0

3.3

Units

V

IDD Power Supply Current

(V1 = 3V, V2= 3V)

8

50

µA

Control Voltage High

Control Voltage Low

0.7x VDD

V

0.3x VDD V

Table 4. Absolute Maximum Ratings

Symbol Parameter/Conditions Min Max Units

VDD

Power supply voltage

VI

Voltage on any input

-0.3 4.0

V

-0.3

VDD+

0.3

V

TST

TOP

PIN

VESD

Storage temperature range -65

Operating temperature

range

-40

Input power (50 Ω)

100 - 3000 MHz

5 - 100 MHz

ESD Voltage (HBM,

ML_STD 883 Method

3015.7)

ESD Voltage (MM, JEDEC,

JESD22-A114-B)

150

°C

85

°C

+34 dBm

+32 dBm

1500

V

100

V

Absolute Maximum Ratings are those values

listed in the above table. Exceeding these values

may cause permanent device damage.

Functional operation should be restricted to the

limits in the DC Electrical Specifications table.

Exposure to absolute maximum ratings for

extended periods may affect device reliability.

Latch-Up Avoidance

Unlike conventional CMOS devices, UltraCMOS®

devices are immune to latch-up.

Electrostatic Discharge (ESD) Precautions

When handling this UltraCMOS® device, observe

the same precautions that you would use with

other ESD-sensitive devices. Although this

device contains circuitry to protect it from damage

due to ESD, precautions should be taken to avoid

exceeding the rating specified in Table 4.

Document No. 70-0174-05 │ www.psemi.com

©2005-2012 Peregrine Semiconductor Corp. All rights reserved.

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