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Lista de partido

74F794

8-Bit Register with Readback

Fairchild Semiconductor 

Input Loading/Fan-Out

Pin Names

OE

CP

D0–D7

Q0–Q7

Description

Output Enable Input

Clock Pulse Inputs

D Bus Inputs/

3-STATE Outputs

Q Bus Outputs

HIGH/LOW

(U.L.)

Current

1.0/1.0 20 µA/−0.6 mA

1.0/1.0

20 µA/−0.6 mA

3.5/1.083 70 µA/−650 µA

750/106.6 −15 mA/64 mA

750/106.6 −15 mA/64 mA

Truth Table

Logic Diagram

Inputs

Outputs

CP

OE Q

D

L or H or ↓

L or H or ↓

↑

↑

L Qn

H Qn

L Qn

HD

Output, Q

Input

Output, Q (Note 1)

Input

Note 1: In this case the output of the register is clocked to the inputs and

the overall Q output is unchanged at Qn.

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