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AD9708-EB

8-Bit, 100 MSPS+ TxDAC® D/A Converter

Analog Devices 

AD9708

ABSOLUTE MAXIMUM RATINGS*

Parameter

With

Respect to Min Max

Units

AVDD

DVDD

ACOM

AVDD

CLOCK, SLEEP

Digital Inputs

IOUTA, IOUTB

COMP1, COMP2

REFIO, FSADJ

REFLO

Junction Temperature

Storage Temperature

Lead Temperature

(10 sec)

ACOM

DCOM

DCOM

DVDD

DCOM

DCOM

ACOM

ACOM

ACOM

ACOM

–0.3 +6.5

V

–0.3 +6.5

V

–0.3 +0.3

V

–6.5 +6.5

V

–0.3 DVDD + 0.3 V

–0.3 DVDD + 0.3 V

–1.0 AVDD + 0.3 V

–0.3 AVDD + 0.3 V

–0.3 AVDD + 0.3 V

–0.3 +0.3

V

+150

°C

–65 +150

°C

+300

°C

*Stresses above those listed under Absolute Maximum Ratings may cause perma-

nent damage to the device. This is a stress rating only; functional operation of the

device at these or any other conditions above those indicated in the operational

sections of this specification is not implied. Exposure to absolute maximum

ratings for extended periods may effect device reliability.

THERMAL CHARACTERISTICS

Thermal Resistance

28-Lead 300 mil SOIC

θJA = 71.4°C/W

θJC = 23°C/W

28-Lead TSSOP

θJA = 97.9°C/W

θJC = 14.0°C/W

PIN CONFIGURATION

(MSB) DB7 1

28 CLOCK

DB6 2

27 DVDD

DB5 3

26 DCOM

DB4 4

25 NC

DB3 5 AD9708 24 AVDD

DB2 6 TOP VIEW 23 COMP2

DB1 7 (Not to Scale) 22 IOUTA

DB0 8

21 IOUTB

NC 9

20 ACOM

NC 10

19 COMP1

NC 11

18 FS ADJ

NC 12

17 REFIO

NC 13

16 REFLO

NC 14

15 SLEEP

NC = NO CONNECT

PIN FUNCTION DESCRIPTIONS

Pin No. Name

Description

1

2–7

8

9–14, 25

15

16

17

18

19

20

21

22

23

24

26

27

28

DB7

DB6–DB1

DB0

NC

SLEEP

REFLO

REFIO

FS ADJ

COMP1

ACOM

IOUTB

IOUTA

COMP2

AVDD

DCOM

DVDD

CLOCK

Most Significant Data Bit (MSB).

Data Bits 1–6.

Least Significant Data Bit (LSB).

No Internal Connection.

Power-Down Control Input. Active

High. Contains active pull-down circuit,

thus may be left unterminated if not

used.

Reference Ground when Internal 1.2 V

Reference Used. Connect to AVDD to

disable internal reference.

Reference Input/Output. Serves as

reference input when internal reference

disabled (i.e., Tie REFLO to AVDD).

Serves as 1.2 V reference output when

internal reference activated (i.e., Tie

REFLO to ACOM). Requires 0.1 µF

capacitor to ACOM when internal

reference activated.

Full-Scale Current Output Adjust.

Bandwidth/Noise Reduction Node.

Add 0.1 µF to AVDD for optimum

performance.

Analog Common.

Complementary DAC Current Output.

Full-scale current when all data bits

are 0s.

DAC Current Output. Full-scale

current when all data bits are 1s.

Internal Bias Node for Switch Driver

Circuitry. Decouple to ACOM with

0.1 µF capacitor.

Analog Supply Voltage (+2.7 V to

+5.5 V).

Digital Common.

Digital Supply Voltage (+2.7 V to

+5.5 V).

Clock Input. Data latched on positive

edge of clock.

ORDERING GUIDE

Model

Temperature Package

Range

Descriptions

Package

Options*

AD9708AR –40°C to +85°C 28-Lead 300 Mil SOIC R-28

AD9708ARU –40°C to +85°C 28-Lead TSSOP

RU-28

AD9708-EB Evaluation Board

*R = Small Outline IC; RU = Thin Small Outline IC.

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily

accumulate on the human body and test equipment and can discharge without detection.

Although the AD9708 features proprietary ESD protection circuitry, permanent damage may

occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD

precautions are recommended to avoid performance degradation or loss of functionality.

–4–

WARNING!

ESD SENSITIVE DEVICE

REV. B

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