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RC5051

Programmable Synchronous DC-DC Controller for Low Voltage Microprocessors

Fairchild Semiconductor 

PRODUCT SPECIFICATION

RC5051

developed across the sense resistor exceeds the 120mV com-

parator threshold voltage, the RC5051 reduces the output

duty cycle to help protect the power devices. The DC-DC

converter returns to normal operation after the fault has been

removed.

Oscillator

The RC5051 oscillator section uses a fixed current capacitor

charging configuration. An external capacitor (CEXT) is

used to set the oscillator frequency between 80KHz and

1MHz. This scheme allows maximum flexibility in choosing

external components.

In general, a higher operating frequency decreases the peak

ripple current flowing in the output inductor, thus allowing

the use of a smaller inductor value. In addition, operation at

higher frequencies decreases the amount of energy storage

that must be provided by the bulk output capacitors during

load transients due to faster loop response of the controller.

Unfortunately, the efficiency losses due to switching of the

MOSFETs increase as the operating frequency is increased.

Thus, efficiency is optimized at lower frequencies. An oper-

ating frequency of 300KHz is a typical choice which opti-

mizes efficiency and minimizes component size while

maintaining excellent regulation and transient performance

under all operating conditions.

Design Considerations and Component

Selection

Additional information on design and component selection

may be found in Fairchild Semiconductor’s Application

Note 53.

MOSFET Selection

This application requires N-channel Logic Level Enhance-

ment Mode Field Effect Transistors. Desired characteristics

are as follows:

• Low Static Drain-Source On-Resistance,

RDS,ON < 20mΩ (lower is better)

• Low gate drive voltage, VGS = 4.5V rated

• Power package with low Thermal Resistance

• Drain-Source voltage rating > 15V.

The on-resistance (RDS,ON) is the primary parameter for

MOSFET selection. The on-resistance determines the power

dissipation within the MOSFET and therefore significantly

affects the efficiency of the DC-DC Converter. For details

and a spreadsheet on MOSFET selection, refer to Applica-

tions Bulletin AB-8

MOSFET Gate Bias

The high side MOSFET gate driver can be biased by one of

two methods–Charge Pump or 12V Gate Bias. The charge

pump method has the advantage of requiring only +5V as an

input voltage to the converter, but the 12V method will real-

ize increased efficiency by providing an increased VGS to the

high side MOSFETs.

Method 1. Charge Pump (Bootstrap)

Figure 3 shows the use of a charge pump to provide gate bias

to the high side MOSFET when +12V is unavailable. Capac-

itor CP is the charge pump used to boost the voltage of the

RC5051 output driver. When the MOSFET Q1 switches off,

the source of the MOSFET is at approximately 0V because

of the MOSFET Q2. (The Schottky D2 conducts for only a

very short time, and is not relevent to this discussion.) CP is

charged through the Schottky diode D1 to approximately

4.5V. When the MOSFET Q1 turns on, the voltage at the

source of the MOSFET is equal to 5V. The capacitor voltage

follows, and hence provides a voltage at VCCQP equal to

almost 10V. The Schottky diode D1 is required to provide

the charge path when the MOSFET is off, and reverses

biases when VCCQP goes to 10V. The charge pump capaci-

tor (CP) needs to be a high Q, high frequency capacitor. A

1µF ceramic capacitor is recommended here.

+5V

PWM/PFM

Control

VCCQP

D1

HIDRV

CP

LODRV

GNDP

Q1

L2 RS

VO

COUT

Q2

D2

65-5051-06

Figure 3. Charge Pump Configuration

Method 2. 12V Gate Bias

Figure 4 illustrates how a 12V source can be used to bias

VCCQP. A 47Ω resistor is used to limit the transient current

into the VCCQP pin and a 1µF capacitor is used to filter the

VCCQP supply. This method provides a higher gate bias

voltage (VGS) to the high side MOSFET than the charge

pump method, and therefore reduces the RDS,ON and the

resulting power loss within the MOSFET. In designs where

efficiency is a primary concern, the 12V gate bias method is

recommended. A 6.2V Zener diode, D1, is used to clamp the

voltage at VCCQP to a maximum of 12V and ensure that the

absolute maximum voltage of the IC will not be exceeded.

REV. 1.0.4 4/2/01

11

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