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RF2705G Ver la hoja de datos (PDF) - RF Micro Devices

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RF2705G Datasheet PDF : 26 Pages
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RF2705G
Pin
22
23
24
Pkg
Base
Function
I SIG P
I SIG N
MODE B
DIE FLAG
Description
Interface Schematic
In-phase I channel positive baseband input port.
Best performance is achieved when the ISIGP and ISIGN are driven differ-
entially with a 1.2V common mode DC voltage. The recommended differ-
ential drive level (VISIGP-VISIGN) is 1.2VP-P for EDGE, 0.8VP-P W-CDMA
modulation and 1.0VP-P for GMSK modulation.
This input should be DC-biased at 1.2V. In sleep mode an internal FET
switch is opened, the input goes high impedance and the modulator is de-
biased.
Phase or amplitude errors between the ISIGP and ISIGN signals will result
in a common-mode signal which may result in an increase in the even
order distortion of the modulation in the output spectrum.
DC offsets between the ISIGP and ISIGN signals will result in increased
carrier leakage. Small DC offsets may be deliberately applied between the
ISIGP/ISIGN and QSIGP/QSIGN inputs to cancel out the LO leakage. The
optimum corrective DC offsets will change with mode, frequency and gain
control.
Common-mode noise on the ISIGP and ISIGN should be kept low as it may
degrade the noise performance of the modulator.
Phase offsets from quadrature between the I and Q baseband signals
results in degrades sideband suppression.
In-phase I channel negative baseband input port. See pin 22.
VCC2
x1
See pin 22.
Mode control pin. See the Logic Truth table.
CMOS Logic inputs: Logic 0=0V to 0.4V; Logic 1=1.4V to VCC.
Ground for LO section, modular, biasing, variable gain amplifier, and sub-
strate.
See pin 6.
Rev A0 DS060206
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
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