Proposed
RF2722
Pin Function Description
25
SSB
SDI enable input (active low).
Interface Schematic
SSB
26
SDI
SDI data input.
SDI
27
SCLK
SDI clock input.
SCLK
28
CLK IN
Clock input for the DC offset correction system. A 26MHz clock must be
applied to this pin for proper operation of the DC offset correction system.
29
RX EN
Set to VCC to activate the IC. Set to GND to deactivate.
30
GPO1
General purpose digital output 1. Controlled via SDI programming.
CLK IN
RX EN
GPO1
31
GPO2
General purpose digital output 2. Controlled via SDI programming.
GPO2
32
RX VCC Supply for the LNA’s.
RX VCC
BIAS
Rev A4 DS050919
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
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