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RT9645 Ver la hoja de datos (PDF) - Richtek Technology

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RT9645
Richtek
Richtek Technology Richtek
RT9645 Datasheet PDF : 13 Pages
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RT9645
Preliminary
Functional Pin Description
Pin No.
1
2
3
4
5
6
7
8
Pin Name
Function Description
SB3V_DRV Gate Drive for 3.3VSB Linear Controller. The pin will be high in S0, S3 and S5 state.
VDD
IC Power Supply. 5VSB is generally applied for bias power for IC logics and gate
driver control.
PWM2 Second PWM Output Signal
Second PWM Soft Start Ramp/Enable Control SS ramp slope is defined by
SS2/EN2
V/T = 5μA/CSS.
COMP2
Compensation pin of PWM2. Output of the PWM2 error amplifier. Connect
compensation network between this pin and FB2.
FB2
The output feedback of PWM2. The pin is applied for voltage regulation and provide
under-voltage protection.
BOOT
The pin is applied for VDDQ PWM bootstrapped power for the embedded driver
power.
UGATE
High-Side Drive. High-side MOSFET driver output of VDDQ PWM. Connect to gate
of high-side MOSFET.
Phase Node of VDDQ PWM. The pin is applied to sense phase node of VDDQ
9
PHASE
PWM for gates switch control.
Current Sense Input. Monitors the voltage drop across the low-side MOSFET for
10
ISNS
Over current protection. ROCSET1 x 40μA = RDS(ON) x IMAX
11
PVIN
Apply to Driver Power Source and generate Internal Power Good Signal.
Low-Side Drive. The low-side MOSFET driver output. Connect to gate of low-side
12
LGATE
MOSFET.
Compensation pin of VDDQ. Output of the VDDQ error amplifier. Connect
compensation network between this pin and FB1 In AMD Application. This pin can
13
COMP1
be used to control VDDQ sequence. This pin needs to be pulled low ( < VDIS1) to
disable the PWM.
The output feedback of PWM1. The pin is applied for voltage regulation,
14
FB1
under-voltage and Over Voltage protection.
PWM2 Current Sense Input. Monitors the voltage drop across the low-side
15
ISNS2
MOSFET for Over current protection. ROCSET2 x 40μA = RDS(ON) x IMAX
16
VTT_EN In AMD K8 Application, Connect this pin to VLDT_EN to control FSB_VTT Timing.
Feedback for the FSB_VTT Linear Controller. The pin is applied for FSB_VTT LDO
17
VTT_SEN
output regulation sense.
Gate drive for FSB_VTT Linear Controller. The pin will be turned off in S3 and S5
18
VTT_DRV
state.
19
GND
Signal Ground.
5VSB Control Switch. The pin is applied to drive an external P-Channel MOSFET to
20
SB5V_DRV
switch 5VDL power to 5VSB in S3 state. The pin goes high in S0 and S5 States.
VCC5 Control Switch. The pin is applied to driver an external N-Channel MOSFET
21
VCC_DRV
low in S5 and S3 States. The pin goes high in S0 State.
22
S5
ACPI Control Signal.
23
S3
ACPI Control Signal.
Feedback for the 3.3VSB Linear Controller. The pin is applied for 3.3V LDO output
24
SB3V_SEN
regulation sense.
Exposed Pad (25) PGND
The exposed pad must be soldered to a large PCB and connected to PGND for
maximum power dissipation.
www.richtek.com
4
DS9645-00 August 2007

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