RTL8100C-LF Ver la hoja de datos (PDF) - Realtek Semiconductor

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RTL8100C-LF

SINGLE-CHIP FAST ETHERNET CONTROLLER WITH POWER MANAGEMENT

Realtek Semiconductor 

RTL8100C & RTL8100CL

Datasheet

List of Figures

Figure 1. Block Diagram .............................................................................................................................3

Figure 2. Pin Assignments ...........................................................................................................................4

Figure 3. LED_RX.....................................................................................................................................52

Figure 4. LED_TX.....................................................................................................................................53

Figure 5. LED_TX+LED_RX ...................................................................................................................53

Figure 6. Target Read.................................................................................................................................55

Figure 7. Target Write ................................................................................................................................55

Figure 8. Configuration Read ....................................................................................................................56

Figure 9. Configuration Write....................................................................................................................56

Figure 10. Bus Arbitration ...........................................................................................................................57

Figure 11. Memory Read .............................................................................................................................57

Figure 12. Memory Write ............................................................................................................................58

Figure 13. Target Initiated Termination - Retry...........................................................................................58

Figure 14. Target Initiated Termination - Disconnect..................................................................................59

Figure 15. Target Initiated Termination - Abort...........................................................................................59

Figure 16. Master Initiated Termination – Abort.........................................................................................60

Figure 17. Parity Operation - One Example ................................................................................................60

Figure 18. Application Information .............................................................................................................61

Single-Chip Fast Ethernet Controller

iv

Track ID: JATR-1076-21 Rev. 1.06

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